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ST72344S2 датащи(PDF) 61 Page - STMicroelectronics |
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ST72344S2 датащи(HTML) 61 Page - STMicroelectronics |
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61 / 247 page ![]() ST72344xx, ST2345xx Interrupts Doc ID 12321 Rev 6 61/247 8.7 External interrupt control register (EICR) Reset value: 0000 0000 (00h) Bits 7:6 = IS1[1:0] ei2 and ei3 sensitivity The interrupt sensitivity, defined using the IS1[1:0] bits, is applied to the following external interrupts: ● ei2 (port B3..0) ● ei3 (port B4) These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3). Bit 5 = IPB Interrupt polarity for port B This bit is used to invert the sensitivity of the port B [3:0] external interrupts. It can be set and cleared by software only when I1 and I0 of the CC register are both set to 1 (level 3). 0: No sensitivity inversion 1: Sensitivity inversion 7 0 IS11 IS10 IPB IS21 IS20 IPA 0 0 Read/Write Table 18. External interrupt sensitivity (ei2) IS11 IS10 Sensitivity IPB bit =0 IPB bit =1 0 0 Falling edge & low level Rising edge & high level 0 1 Rising edge only Falling edge only 1 0 Falling edge only Rising edge only 1 1 Rising and falling edge Table 19. External interrupt sensitivity (ei3) IS11 IS10 Sensitivity 0 0 Falling edge & low level 0 1 Rising edge only 1 0 Falling edge only 1 1 Rising and falling edge |
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