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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC97338 датащи(PDF) 136 Page - National Semiconductor (TI) |
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PC97338 датащи(HTML) 136 Page - National Semiconductor (TI) |
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136 / 221 page  136 www.national.com 4.4.5 ECP Data Register (DATAR), Bits 7-5 of ECR = 000 or 001, Offset 000h The ECP Data Register (DATAR) register is the same as the DTR register (see Section 4.2.3), except that a read always returns the values of the PD7-0 signals instead of the register latched data. FIGURE 77. DATAR Register Bitmap 76 54 321 0 Reset Required 0 0 0 0 0 0 0 0 Parallel Port FIFO Register (CFIFO) Offset 400h Reset Required ECP Data FIFO Register (DFIFO) Offset 400h 76 54 321 0 Reset Required 0 0 0 0 0 0 0 0 Test FIFO Register (TFIFO) Offset 400h Bits 7-5 of ECR = 010 Bits 7-5 of ECR = 011 Bits 7-5 of ECR = 110 76 54 321 0 Reset Required 0 0 1 0 1 0 0 0 0 0 1 1 0 0 0 Configuration Register A (CNFGA) Offset 400h Always 0 Always 0 Always 0 Bit 5 of ASC Bits 7-5 of ECR = 111 7 6 5 432 10 0 0 0 0 0 0 0 0 Data Bits D0 - D7 Data Bits D0 - D7 Data Bits D0 - D7 Always 0 Always 0 Always 1 Always 1 76 54 321 0 Reset Required 0 0 0 0 0 0 0 0 Configuration Register B (CNFGB) Offset 401h Reserved Interrupt Select IRQ Signal Value Reserved DMA Channel Select Bits 7-5 of ECR = 111 76 54 321 0 Reset Required 1 0 1 0 1 0 0 0 Extended Control (ECR) Offset 402h ECP Service ECP Interrupt Mask ECP Mode Control ECP DMA Enable FIFO Full All ECP Modes FIFO Empty 76 54 321 0 Reset Required 0 0 0 0 0 0 0 0 ECP Data Register (DATAR) Offset 000h D2 D4 D5 D6 D7 D0 D1 D3 Bits 7-5 of ECR = 000 or 001 |
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