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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM504 датащи(PDF) 13 Page - Texas Instruments |
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DM504 датащи(HTML) 13 Page - Texas Instruments |
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13 / 211 page  Copyright © 2016–2017, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback 13 DM504 www.ti.com SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017 Table 4-1. Pin Attributes(1) (continued) BALL NUMBER BOTTOM [1] BALL NUMBER TOP [2] BALL NAME [3] SIGNAL NAME [4] MUXMODE [5] TYPE [6] BALL RESET STATE [7] BALL RESET REL. STATE [8] BALL RESET REL. MUXMODE [9] I/O VOLTAGE VALUE [10] POWER [11] HYS [12] BUFFER TYPE [13] PULL UP/DOWN TYPE [14] DSIS [15] H23 ddr1_d9 ddr1_d9 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy G23 ddr1_d10 ddr1_d10 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy F22 ddr1_d11 ddr1_d11 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy E22 ddr1_d12 ddr1_d12 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy E23 ddr1_d13 ddr1_d13 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy D23 ddr1_d14 ddr1_d14 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy C22 ddr1_d15 ddr1_d15 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AB12 ddr1_d16 ddr1_d16 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AC13 ddr1_d17 ddr1_d17 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AB14 ddr1_d18 ddr1_d18 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AC14 ddr1_d19 ddr1_d19 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AB15 ddr1_d20 ddr1_d20 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AC16 ddr1_d21 ddr1_d21 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AB17 ddr1_d22 ddr1_d22 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy AC17 ddr1_d23 ddr1_d23 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy B17 ddr1_d24 ddr1_d24 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy A17 ddr1_d25 ddr1_d25 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy A16 ddr1_d26 ddr1_d26 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy B15 ddr1_d27 ddr1_d27 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy B14 ddr1_d28 ddr1_d28 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy A14 ddr1_d29 ddr1_d29 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy A13 ddr1_d30 ddr1_d30 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy B12 ddr1_d31 ddr1_d31 0 IO PD PD 1.2 vdds_ddr NA LVCMOS DDR PUx/PDy |
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