P12C508 datasheet(20/84 Pages) MICROCHIP

20 / 84 page

PIC12C5XX

DS40139A-page 20

Advance Information

5.4

I/O Programming Considerations

5.4.1

BI-DIRECTIONAL I/O PORTS

Some instructions operate internally as read followed

by write operations. The BCF and BSF instructions, for

example, read the entire port into the CPU, execute

the bit operation and re-write the result. Caution must

be used when these instructions are applied to a port

where one or more pins are used as input/outputs. For

example, a BSF operation on bit5 of GPIO will cause

all eight bits of GPIO to be read into the CPU, bit5 to

be set and the GPIO value to be written to the output

latches. If another bit of GPIO is used as a bi-

directional I/O pin (say bit0) and it is deﬁned as an

input at this time, the input signal present on the pin

itself would be read into the CPU and rewritten to the

data latch of this particular pin, overwriting the

previous content. As long as the pin stays in the input

mode, no problem occurs. However, if bit0 is switched

into output mode later on, the content of the data latch

may now be unknown.

Example 5-1 shows the effect of two sequential read-

modify-write instructions (e.g., BCF, BSF, etc.) on an

I/O port.

A pin actively outputting a high or a low should not be

driven from external devices at the same time in order

to change the level on this pin (“wired-or”, “wired-

and”). The resulting high output currents may damage

the chip.

EXAMPLE 5-1:

READ-MODIFY-WRITE

INSTRUCTIONS ON AN

I/O PORT

;Initial GPIO Settings

; GPIO<5:3> Inputs

; GPIO<2:0> Outputs

;GPIO<6> have external pull-ups and are

;not connected to other circuitry

;

GPIO latch

GPIO pins

;

----------

BCF

GPIO, 5

;--01 -ppp

--11 pppp

BCF

GPIO, 4

;--10 -ppp

--11 pppp

MOVLW 007h

;

TRIS

GPIO

;--10 -ppp

--11 pppp

;

;Note that the user may have expected the pin

;values to be --00 pppp. The 2nd BCF caused

;GP4 to be latched as the pin value (High).

5.4.2

SUCCESSIVE OPERATIONS ON I/O

PORTS

The actual write to an I/O port happens at the end of

an instruction cycle, whereas for reading, the data

must be valid at the beginning of the instruction cycle

(Figure 5-2). Therefore, care must be exercised if a

write followed by a read operation is carried out on the

same I/O port. The sequence of instructions should

allow the pin voltage to stabilize (load dependent)

before the next instruction, which causes that ﬁle to be

read into the CPU, is executed. Otherwise, the

previous state of that pin may be read into the CPU

rather than the new state. When in doubt, it is better to

separate these instructions with a NOP or another

instruction not accessing this I/O port.

FIGURE 5-2:

SUCCESSIVE I/O OPERATION

PC + 1

PC + 2

PC + 3

Q1 Q2 Q3 Q4

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

Q1 Q2 Q3 Q4

Instruction

fetched

GP5:GP0

MOVWF GPIO

NOP

Port pin

sampled here

NOP

MOVF GPIO,W

Instruction

executed

MOVWF GPIO

(Write to

GPIO)

NOP

MOVF GPIO,W

This example shows a write to GPIO followed

by a read from GPIO.

Data setup time = (0.25 TCY – TPD)

where: TCY = instruction cycle.

TPD = propagation delay

Therefore, at higher clock frequencies, a

write followed by a read may be problematic.

(Read

GPIO)

Port pin

written here

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