| поискавой системы для электроныых деталей |
|
P12C508 датащи(PDF) 34 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
P12C508 датащи(HTML) 34 Page - Microchip Technology |
|
34 / 84 page ![]() PIC12C5XX DS40139A-page 34 Advanced Information © 1996 Microchip Technology Inc. 7.7 Time-Out Sequence, Power Down, and Wake-up from SLEEP Status Bits (TO/PD/GPWUF) The TO, PD, and GPWUF bits in the STATUS register can be tested to determine if a RESET condition has been caused by a power-up condition, a MCLR or Watchdog Timer (WDT) reset, or a MCLR or WDT reset. These STATUS bits are only affected by events listed in Table 7-7. Table 7-4 lists the reset conditions for the special function registers, while Table 7-3 lists the reset conditions for all the registers. TABLE 7-6: TO/PD/GPWUF STATUS AFTER RESET GPWUF TO PD RESET caused by 00 0 WDT wake-up from SLEEP 00 1 WDT time-out (not from SLEEP) 01 0 MCLR wake-up from SLEEP 01 1 Power-up 0u u MCLR not during SLEEP 11 0 Wake-up from SLEEP on pin change Legend: Legend: u = unchanged Note 1: The TO, PD, and GPWUF bits main- tain their status (u) until a reset occurs. A low-pulse on the MCLR input does not change the TO, PD, and GPWUF status bits. TABLE 7-7: EVENTS AFFECTING TO/PD STATUS BITS Event GPWUF TO PD Remarks Power-up 01 1 WDT Time-out 00 u No effect on PD SLEEP instruction u1 0 CLRWDT instruction u1 1 Wake-up from SLEEP on pin change 11 0 Legend: u = unchanged A WDT time-out will occur regardless of the status of the TO bit. A SLEEP instruction will be executed, regardless of the status of the PD bit. Table 7-6 reflects the status of TO and PD after the corresponding event. 7.8 Reset on Brown-Out A brown-out is a condition where device power (VDD) dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset PIC12C5XX devices when a brown-out occurs, external brown-out protection circuits may be built, as shown in Figure 7-13 and Figure 7-14. FIGURE 7-13: BROWN-OUT PROTECTION CIRCUIT 1 FIGURE 7-14: BROWN-OUT PROTECTION CIRCUIT 2 This circuit will activate reset when VDD goes below Vz + 0.7V (where Vz = Zener voltage). *Refer to Figure 7-7 and Table 10-5 for internal weak pull- up on MCLR. 33k 10k 40k* VDD MCLR PIC12C5XX VDD Q1 This brown-out circuit is less expensive, although less accurate. Transistor Q1 turns off when VDD is below a certain level such that: *Refer to Figure 7-7 and Table 10-5 for internal weak pull-up on MCLR. VDD • R1 R1 + R2 = 0.7V R2 40k VDD MCLR PIC12C5XX R1 Q1 VDD |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |