P12C508 datasheet(59/84 Pages) MICROCHIP

59 / 84 page

Advance Information

DS40139A-page 59

PIC12C5XX

FIGURE 10-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC12C5XX

TABLE 10-3:

RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC12C5XX

AC Characteristics Standard Operating Conditions (unless otherwise speciﬁed)

Operating Temperature

°C ≤ TA ≤ +70°C (commercial)

–40

°C ≤ TA ≤ +85°C (industrial)

Operating Voltage VDD range is described in Section 10.1

Parameter

No.

Sym

Characteristic

Min

Typ(1)

Max

Units

Conditions

TmcL

MCLR Pulse Width (low)

2000*

—

VDD = 5 V

Twdt

Watchdog Timer Time-out Period

(No Prescaler)

18*

30*

VDD = 5 V (Commercial)

TDRT

Device Reset Timer Period(2)

18*

30*

VDD = 5 V (Commercial)

TioZ

I/O Hi-impedance from MCLR Low

—

100*

* These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is at 5V, 25

°C unless otherwise stated. These parameters are for design

guidance only and are not tested

2: DRT runs only on power-up and in normal execution in EXTRC and INTRC modes, and never runs in test

modes. (i.e. does not run on wake-up from sleep)

VDD

MCLR

Internal

POR

DRT

Timeout

Internal

RESET

Watchdog

Timer

RESET

I/O pin

(Note 1)

Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.

(Note 2)

2: Runs in MCLR or WDT reset only in XT and LP modes.

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