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LAN9115 датащи(PDF) 13 Page - Microchip Technology |
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LAN9115 датащи(HTML) 13 Page - Microchip Technology |
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13 / 114 page ![]() 2005-2016 Microchip Technology Inc. DS00002269A-page 13 LAN9115 Note 2-1 Please refer to the Microchip application note AN 12.5 titled “Designing with the LAN9118 - Getting Started”. It is also important to note that this application note applies to the whole Microchip LAN9118 family of Ethernet controllers. However, subtle differences may apply. 1,66 Core Ground GND_CORE P 2 Ground for internal digital logic 7 PLL Power VDD_PLL P 1 1.8V Power from the internal PLL regulator. This external pin must be connected to a 10uF 0.1-Ohm ESR capacitor, in parallel with a 0.01uF capacitor to Ground. This pin must not be used to supply power to other external devices. See Note 2-1 4 PLL Ground VSS_PLL P 1 GND for the PLL 8 Reference Power VDD_REF P 1 Connected to 3.3v power and used as the reference voltage for the internal PLL 11 Reference Ground VSS_REF P 1 Ground for internal PLL reference voltage TABLE 2-6: MII INTERFACE SIGNALS Pin No. Name Symbol Buffer Type # Pins Description 40 Transmit Clock: TX_CLK I (PD) 1 Transmit Clock: 25MHz in 100Base- TX mode. 2.5MHz in 10Base-T mode. 36, 37, 38, 39 Transmit Data [3:0] TXD[3:0] O8 (PD) 4 Transmit Data 3-0: Data bits that are accepted by the PHY for transmission. When the internal PHY is selected, these signals are driven low (0). 21 Transmit Enable TX_EN O8 (PD) 1 Transmit Enable: Indicates that valid data is presented on the TXD[3:0] signals, for transmission. When the internal PHY is selected, this signal is driven low (0). 26 Receive Clock RX_CLK I (PD) 1 Receive Clock: 25MHz in 100Base-TX mode. 2.5MHz in 10Base-T mode. 25 Receive Error RX_ER I (PD) 1 Receive Error: Asserted by the PHY to indicate that an error was detected somewhere in the frame presently being transferred from the PHY. 33 Collision Detect: COL/ I (PD) 1 MII Collision Detect: Asserted by the PHY to indicate detection of collision condition. 24, 23, 22, 75 Receive Data[3:0] RXD[3:0] I (PD) 1 Receive Data 3-0: Data bits that are sent from the PHY to the Ethernet MAC. 32 Carrier Sense CRS I (PD) 1 Carrier Sense: Indicates detection of carrier. 29 Receive Data Valid: RX_DV I (PD) 1 Receive Data Valid: Indicates that recovered and decoded data nibbles are being presented by the PHY on RXD[3:0]. TABLE 2-5: SYSTEM AND POWER SIGNALS (CONTINUED) Pin No. Name Symbol Buffer Type # Pins Description |
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