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LAN89218 датащи(PDF) 75 Page - Microchip Technology |
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LAN89218 датащи(HTML) 75 Page - Microchip Technology |
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75 / 148 page ![]() 2008-2015 Microchip Technology Inc. DS60001255B-page 75 LAN89218 5.3.2 IRQ_CFG—INTERRUPT CONFIGURATION REGISTER This register configures and indicates the state of the IRQ signal. Offset: 54h Size: 32 bits Bits Description Type Default 31:24 Interrupt Deassertion Interval (INT_DEAS). This field determines the Interrupt Request Deassertion Interval in multiples of 10 µs. Setting this field to zero causes the device to disable the INT_DEAS Inter- val, reset the interval counter, and issue any pending interrupts. If a new, non-zero value is written to this field, any subsequent interrupts will obey the new setting. Note: This field does not apply to the PME interrupt. R/W 0 23:15 Reserved RO - 14 Interrupt Deassertion Interval Clear (INT_DEAS_CLR). Writing a one to this register clears the de-assertion counter in the IRQ Controller, thus causing a new de-assertion interval to begin (regardless of whether or not the IRQ Controller is currently in an active de-assertion interval). SC 0 13 Interrupt Deassertion Status (INT_DEAS_STS). When set, this bit indi- cates that interrupts are currently in a deassertion interval, and will not be delivered to the IRQ pin. When this bit is clear, interrupts are not currently in a deassertion interval, and will be delivered to the IRQ pin. SC 0 12 Master Interrupt (IRQ_INT). This read-only bit indicates the state of the internal IRQ line, regardless of the setting of the IRQ_EN bit, or the state of the interrupt de-assertion function. When this bit is high, one of the enabled interrupts is currently active. RO 0 11:9 Reserved RO - 8 IRQ Enable (IRQ_EN) – This bit controls the final interrupt output to the IRQ pin. When clear, the IRQ output is disabled and permanently deas- serted. This bit has no effect on any internal interrupt status bits. R/W 0 7:5 Reserved RO - 4 IRQ Polarity (IRQ_POL) – When cleared, enables the IRQ line to function as an active low output. When set, the IRQ output is active high. When IRQ is configured as an open-drain output this field is ignored, and the interrupt output is always active low. R/W NASR 0 3:1 Reserved RO - 0 IRQ Buffer Type (IRQ_TYPE) – When cleared, enables IRQ to function as an open-drain buffer for use in a Wired-Or Interrupt configuration. When set, the IRQ output is a Push-Pull driver. When configured as an open-drain output the IRQ_POL field is ignored, and the interrupt output is always active low. R/W NASR 0 |
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