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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LAN89218 датащи(PDF) 73 Page - Microchip Technology |
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LAN89218 датащи(HTML) 73 Page - Microchip Technology |
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73 / 148 page  2008-2015 Microchip Technology Inc. DS60001255B-page 73 LAN89218 5.3 System Control and Status Registers Table 5-1 lists the registers that are directly addressable by the host bus. TABLE 5-1: DIRECT ADDRESS REGISTER MAP Control and Status Registers Base Address + Offset Symbol Register Name Default 50h ID_REV Chip ID and Revision. Section 5.3.1 54h IRQ_CFG Main Interrupt Configuration 00000000h 58h INT_STS Interrupt Status 00000000h 5Ch INT_EN Interrupt Enable Register 00000000h 60h RESERVED Reserved for future use - 64h BYTE_TEST Read-only byte order testing register 87654321h 68h FIFO_INT FIFO Level Interrupts 48000000h 6Ch RX_CFG Receive Configuration 00000000h 70h TX_CFG Transmit Configuration 00000000h 74h HW_CFG Hardware Configuration 00050000h 78h RX_DP_CTL RX Datapath Control 00000000h 7Ch RX_FIFO_INF Receive FIFO Information 00000000h 80h TX_FIFO_INF Transmit FIFO Information 00001200h 84h PMT_CTRL Power Management Control 00000000h 88h GPIO_CFG General Purpose IO Configuration 00000000h 8Ch GPT_CFG General Purpose Timer Configuration 0000FFFFh 90h GPT_CNT General Purpose Timer Count 0000FFFFh 94h RESERVED Reserved for future use - 98h WORD_SWAP WORD SWAP Register 00000000h 9Ch FREE_RUN Free Run Counter - A0h RX_DROP RX Dropped Frames Counter 00000000h A4h MAC_CSR_CMD MAC CSR Synchronizer Command (MAC CSR’s are indexed through this register) 00000000h A8h MAC_CSR_DATA MAC CSR Synchronizer Data 00000000h ACh AFC_CFG Automatic Flow Control Configuration 00000000h B0h E2P_CMD EEPROM Command 00000000h B4h E2P_DATA EEPROM Data 00000000h B8h - FCh RESERVED Reserved for future use - |
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