UCS1002-2 datasheet(77/114 Pages) MICROCHIP

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Programmable USB Port Power Controller with Charger Emulation

Datasheet

SMSC UCS1002

Revision 1.4 (07-16-13)

DATASHEET

Bit 1 - LG2 - Indicates that the portable device successfully performed a handshake with the Legacy

2 charger emulation profile and is charging. The high-speed switch will be controlled via the HSW_DCE

bit (see Section 10.4.5, "High-speed Switch Configuration - 25h"). The port power switch current

limiting mode is determined by the Custom current limiting behavior settings (see Section 10.14.2,

"Custom Current Limiting Behavior Configuration - 51h").

Bit 0 - LG1 - Indicates that the portable device successfully performed a handshake with the Legacy

1 charger emulation profile and is charging. The high-speed switch will be controlled via the HSW_DCE

bit (see Section 10.4.5, "High-speed Switch Configuration - 25h"). The port power switch current

limiting mode is determined by the Custom current limiting behavior settings (see Section 10.14.2,

"Custom Current Limiting Behavior Configuration - 51h").

10.3.6

Pin Status Register - 14h

The Pin Status register reflects the current pin state of the external control pins as well as identifying

the power state. These bits are linked to the X_SET bits (see Section 10.4.3).

Bit 6 - PWR_EN_PIN - Reflects the PWR_EN control state. This bit is set and cleared automatically

as the PWR_EN pin / PWR_EN_SET bit state changes.

Bit 5 - M2_PIN - Reflects the M2 pin state. This bit is set and cleared automatically as the M2 pin /

M2_SET state changes.

Bit 4 - M1_PIN - Reflects the M1 pin state. This bit is set and cleared automatically as the M1 pin /

M1_SET state changes.

Bit 3 - EM_EN_PIN - Reflects the EM_EN pin state. This bit is set and cleared automatically as the

EM_EN pin / EM_EN_SET state changes.

Bit 2 - SEL_PIN - Reflects the polarity settings determined by the SEL pin decode. This bit is set or

cleared automatically upon device power-up as the SEL pin is decoded.



‘0’ - The PWR_EN control is active low.



‘1’ - The PWR_EN control is active high.

Bits 1 - 0 - PWR_STATE[1:0] - Indicates the current power state as shown in Table 10.6. These bits

are set and cleared automatically as the power state changes.

APPLICATION NOTE: Accessing the SMBus / I2C causes the UCS1002 to leave the Sleep state. As a result, the

PWR_STATE[1:0] bits will never read as 00b.

Table 10.6 PWR_STATE Bit Decode

PWR_STATE[1:0]

POWER STATE

Sleep

Detect

Active

Error

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