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SST49LF080A датащи(PDF) 29 Page - Microchip Technology |
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SST49LF080A датащи(HTML) 29 Page - Microchip Technology |
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29 / 50 page ![]() ©2014 Silicon Storage Technology, Inc. DS20005086B 11/14 29 8 Mbit LPC Flash SST49LF080A Data Sheet Figure 13:LCLK Waveform (LPC Mode) Table 16: Pin Capacitance (VDD=3.3V, Ta=25 °C, f=1 Mhz, other pins open) Parameter Description Test Condition Maximum CI/O1 I/O Pin Capacitance VI/O=0V 12 pF CIN1 Input Capacitance VIN=0V 12 pF T16.0 25026 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Table 17: Reliability Characteristics Symbol Parameter Minimum Specification Units Test Method NEND1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Endurance 10,000 Cycles JEDEC Standard A117 TDR1 Data Retention 100 Years JEDEC Standard A103 ILTH1 Latch Up 100 + IDD mA JEDEC Standard 78 T17.0 25026 Table 18: Clock Timing Parameters (LPC Mode) Symbol Parameter Min Max Units TCYC LCLK Cycle Time 30 ns THIGH LCLK High Time 11 ns TLOW LCLK Low Time 11 ns - LCLK Slew Rate (peak-to-peak) 1 4 V/ns - RST# or INIT# Slew Rate 50 mV/ns T18.0 25026 1235 F12.0 0.4 VDD p-to-p (minimum) Tcyc Thigh Tlow 0.4 VDD 0.3 VDD 0.6 VDD 0.2 VDD 0.5 VDD |
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