PC87382 datasheet(14/72 Pages) NSC

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Revision 1.2

2.0

Power, Reset and Clocks

2.1

POWER

2.1.1

Power Planes

The PC87382 has a single 3.3V power source, VDD. Internally, an additional power plane (VCORF) is generated using an on-

chip voltage converter. This power plane feeds all the core logic.

2.1.2

Power States

The following terminology is used in this document to describe the power states:

• Power On - V

DD is active.

• Power Off - V

DD is inactive.

2.1.3

Power Connection and Layout Guidelines

The PC87382 requires a power supply voltage of 3.3V

± 10% for the V

DD supply. The on-chip Core voltage converter gen-

erates a voltage below 3V for the internal logic.

VDD and VCORF use a common ground return marked VSS.

To obtain the best performance, bear in mind the following recommendations.

Ground Connection. The following items must be connected to the ground layer (VSS) as close to the device as possible:

• The ground return (V

SS) pins

• The decoupling capacitors of the Main power supply (V

DD) pins

• The decoupling capacitor of the on-chip Core power converter (V

CORF) pin

Note that a low-impedance ground layer also improves noise isolation.

Decoupling Capacitors. The following decoupling capacitors must be used in order to reduce EMI and ground bounce:

• Main power supply (V

DD): Place one 0.1 µF capacitor on each VDD-VSS pin pair, as close to the pin as possible. In ad-

dition, place one 10

−47 µF tantalum capacitor on the common net as close to the device as possible.

• On-Chip Core power converter (V

CORF): Place one 0.1 µF ceramic capacitor on the VCORF-VSS pin pair as close to the

pin as possible.

Figure 1. Decoupling Capacitors Connection

VDD

0.1

µF

VSS

10-47

µF

Main 3.3V

VDD

VSS

VDD

VSS

0.1

µF

0.1

µF

VCORF

0.1

µF

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