PC87382 datasheet(40/72 Pages) NSC

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5.0 General-Purpose Input/Output (GPIO) Port (Continued)

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Revision1.2

5.3

EVENT HANDLING AND SYSTEM NOTIFICATION

The enhanced GPIO port supports system notification based on event detection. This functionality is based on six configu-

ration bits and a bit slice of runtime registers GPEVEN and GPEVST. The configuration and operation of the event detection

capability is shown in Figure 10. System notification is shown in Figure 11.

Figure 10. Event Detection

5.3.1

Event Configuration

Each pin in the GPIO port is a potential input event source. The event detection can trigger a system notification on prede-

termined behavior of the source pin. The GPCFG register determines the event detection trigger type for the system notifi-

cation.

Event Type and Polarity

Two trigger types of event detection are supported: edge and level. An edge event can be detected on a source pin transition

either from high to low or low to high. A level event may be detected when the source pin is at active level. The trigger type

is determined by Event Type (bit 4 of the GPCFG register). The direction of the transition (for edge) or the polarity of the

active level (for level) is determined by Event Polarity (bit 5 of the GPCFG register).

Active edge refers to a change in a GPIO pin level that matches the Event Polarity bit (1 for rising edge and 0 for falling

edge). Active level refers to the GPIO pin level that matches the Event Polarity bit (1 for high level and 0 for low level). The

corresponding bit in GPEVST register is set by hardware whenever an active edge or an active level is detected, regardless

of the GPEVEN register setting. Writing 1 to the Status bit clears it to 0. Writing 0 is ignored.

Event Debounce Enable

The input signal can be debounced for at least 16 msec before entering the Rising Edge detector. The signal state is trans-

ferred to the detector only after a debouncing period during which the signal has no transitions, to ensure that the signal is

stable. The debouncer adds 16 msec delay to both assertion and de-assertion of the event pending indicator. Therefore,

when working with a level event and system notification by IRQ, it is recommended to disable the debounce if the delay in

the IRQ de-assertion is not acceptable. The debounce is controlled by Event Debounce Enable (bit 6 of the GPCFG register).

5.3.2

System Notification

System notification on GPIO-triggered events is done by asserting an Interrupt Request (via the device’s Bus Interface).

The system notiﬁcation for each GPIO pin is controlled by the corresponding bits in the GPEVEN and GPEVR registers.

System notification by a GPIO pin is enabled if the corresponding bit of the GPEVEN register is set to 1. The event routing

mechanism is shown in Figure 11.

Event

Enable

Event Polarity

Input

Debouncer

Event

Internal

Bus

Level =1

Write 1 to Clear

Status

Rising Edge or

Rising

Edge

Detector

High Level =1

GPIO Pin Conﬁguration Register

Event Type

Event

Debounce

Enable

R/W

Bit 6

Bit 5

Bit 4

Indication

Pending

(GPCFG)

Reset

Set

Read

GPIO

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