LP8501 datasheet(38/51 Pages) TI1

38 / 51 page

100

PWM Bits

00000000

10000000

11111111

LP8501

SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013

www.ti.com

–

11 = Fader group 3 controls the D1 driver. The user can set the overall output of the group by the GROUP

3 FADER register at the address 4Ah and the fade-in/fade-out time by the GROUP 3 FADING register at

the address 04h.

•

06 — Bit [5] LOG_EN

–

0 = linear adjustment.

–

1 = logarithmic adjustment.

–

This bit is effective for both the program execution engine control and direct PWM control.

07 D2 CONTROL to 0E D9 CONTROL

•

The control registers and control bits for D2 output to D9 output are similar to that given to D1.

15 GPO CONTROL

•

The control register and control bits for GPO output are similar to that given to D1.

16 D1 PWM

•

This is the PWM duty cycle control for D1 output. D1 PWM register is effective during direct control operation

- direct PWM control is active after power up by default. Note: serial bus address auto increment is not

supported for register addresses from 16 to 1E.

•

16 — Bits [7:0] PWM

–

16 - Bits [7:0] PWM These bits set the D1 output PWM as shown in Figure 29 below.

Figure 29.

17 D2 PWM to 1E D9 PWM

•

PWM duty cycle control for outputs D2 to D9. The control registers and control bits for D2 output to D9 output

are similar to that given to D1.

25 GPO PWM

•

PWM duty cycle control for GPO. The control register and control bits for GPO are similar to that given to D1.

26 D1 OUTPUT CURRENT CONTROL

•

D1 LED driver current control register. The resolution is 8-bits and step size is 100

μA. .

CURRENT bits

Output Current

00000000

0.0 mA

00000001

0.1 mA

00000010

0.2 mA

...

10101111

17.5 mA default setting

....

11111110

25.4 mA

11111111

25.5 mA

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