LP8501 datasheet(25/51 Pages) TI1

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LP8501

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SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013

END

Ends program execution and resets the PC. Instruction takes sixteen 32 kHz clock cycles. An end instruction can

have two parameters, INT and RESET. These parameters are described in tables below. Execution engine bits

(Register 00h bits [5:0]) are set to zero, i.e., hold mode.

Name

Value

Description

int

No interrupt will be sent. PWM registers values will remain intact. Program

counter value is set to 0.

Reset program counter value to 0 and send interrupt to processor by pulling

the INT pin down and setting corresponding status bit high to notify that

program has ended. PWM register values will remain intact. Interrupt can

be cleared by reading interrupt bits in STATUS/INTERRUPT register at

address 3Ah

Name

Value

Description

reset

Reset program counter value to 0 and hold. PWM register values remain

intact.

Reset program counter value to 0 and hold. PWM register values of the

non-mapped drivers will remain. PWM register values of the mapped drivers

will be set to '0000 0000'.

TRIGGER

Wait or send triggers can be used to synchronize operation between the program execution engines. A send

trigger instruction takes sixteen 32 kHz clock cycles and a wait-for trigger takes at least sixteen 32 kHz clock

cycles. The receiving engine stores the triggers which have been sent. Received triggers are cleared by wait for

trigger instruction. Wait for trigger instruction is executed until all the defined triggers have been received (note:

several triggers can be defined in the same instruction).

An external trigger input signal must stay low for at least two 32 kHz clock cycles to be executed. A trigger output

signal is three 32 kHz clock cycles long. An external trigger signal is active low, i.e. when trigger is send/received

the pin is pulled to GND. Sent external trigger is masked, i.e,. the device which has sent the trigger will not

recognize it. If send and wait external triggers are used on the same instruction, the send external trigger is

executed first, then the wait external trigger.

Name

Value (d)

Description

wait for a trigger

0 to 31

Wait for a trigger from the engine(s). Several triggers can be defined in the

same instruction. Bit [7] engages engine 1, bit [8] engages engine 2, bit [9]

engages engine 3 and bit [6] is for external trigger I/O. Bits [4] and [5] are

not in use.

send a trigger

0 to 31

Send a trigger to the engine(s). Several triggers can be defined in the same

instruction. Bit [1] engages engine 1, bit [2] engages engine 2, bit [3]

engages engine 3 and bit [6] is for external trigger I/O. Bits [4] and [5] are

not in use.

Power Saving

Automatic Power Save Mode

Automatic power save mode is enabled when the POWERSAVE_EN bit in register address 36h is ‘1’. Almost all

analog blocks are powered down in power save if an external clock signal is used. Only the charge pump

protection circuits remain active. However, if the internal clock has been selected, only the charge pump and

LED drivers are disabled during the power save; the digital part of the LED controller needs to stay active. In

both cases the charge pump enters the weak 1x mode. In this mode the charge pump utilizes a passive current

limited keep-alive switch, which keeps the output voltage at the battery level. During the program execution

LP8501 can enter power save if there is no PWM activity in any of the LED driver outputs. To prevent short

power save sequences during program execution, LP8501 has an instruction look-ahead filter. During program

execution engine 1, engine 2 and engine 3 instructions are constantly analyzed, and if there are time slots with

no PWM activity on LED driver outputs for 50 ms, the device will enter power save. In power save mode program

execution continues uninterruptedly. When an instruction that requires PWM activity is executed, a fast internal

startup sequence will be started automatically.

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