LP8501 datasheet(22/51 Pages) TI1

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DIMMING

CONTROL

STEP COUNT

STEP TIME

SPAN =

187.5 ms

TIME ELAPSED (ms)

375

750

1125

1500

140

141

142

143

144

145

146

147

148

RAMP INSTRUCTION

LP8501

SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013

www.ti.com

RAMP

This is the instruction useful for smoothly changing from one PWM value into another PWM value on the D1 to

D9 outputs; in other words, generating ramps (with a negative or positive slope). The LP8501 allows

programming of very fast and very slow ramps.

Ramp instruction generates a PWM ramp, using the effective PWM value as a starting value. At each ramp step

the output is incremented/decremented by one unit, unless the step time span is 0 or number of increments is 0.

Time span for one ramp step is defined with prescale (bit [14]) and step time (bits [13:9]). Prescale = 0 sets 0.49

ms cycle time and prescale = 1 sets 15.6 ms cycle time; so the minimum time span for one step is 0.49 ms

(prescale * step time span = 0.49ms x 1) and the maximum time span is 15.6 ms x 31 = 484ms/step. Note: if all

the step time bits [13:9] are set to zero, instruction is treated as Set PWM instruction.

The number of increment define how many steps will be taken during one ramp instruction; maximum increment

value is 255d, which corresponds to incrementing from zero to the maximum value. If PWM reaches

minimum/maximum value (0/255) during the ramp instruction, ramp instruction will be executed to the end

regardless of saturation. This enables ramp instruction to be used as a combined ramp & wait instruction. Note:

Ramp instruction is the wait instruction when the increment bits [7:0] are set to zero.

Setting bit LOG_EN high/low sets logarithmic (1) or linear ramp (0) (bit 5 in registers 06h — 0Eh and in register

15h for GPO). By using the logarithmic ramp setting the visual effect appears like a linear ramp, because the

human eye behaves in a logarithmic way.

Name

Value (d)

Description

prescale

Divides master clock (32 768 Hz) by 16 = 2048 Hz

→ 0.488 ms cycle time

Divides master clock (32 768 Hz) by 512 = 64 Hz

→ 15.625 ms cycle time

sign

Increase PWM output

Decrease PWM output

step time

1 - 31

One ramp increment done in (step time) x (prescale). Note: 0 means Set PWM instruction

# of increments

0 - 255

The number of increment/decrement cycles Note: Value 0 takes the same time as increment by 1, but

it is the wait instruction.

RAMP INSTRUCTION APPLICATION EXAMPLE

Let's say that the LED dimming is controlled according to the linear scale and effective PWM value at the

moment t=0 is 140d (~55%,), as shown in Figure 21 below, and we want to reach a PWM value of 148d (~58%)

at the moment t = 1.5s. The parameters for the RAMP instruction will be:

•

Prescale = 1

→ 15.625 ms cycle time

•

Step time = 12

→ step time span will be 12*15.625 ms = 187.5 ms

•

Sign = 0

→ increase PWM output

•

# of increments = 8

→ take 8 steps

Figure 21. Example of Ramp Instruction

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