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VT82C596 датащи(PDF) 58 Page - List of Unclassifed Manufacturers

номер детали VT82C596
подробное описание детали  PCI INTEGRATED PERIPHERAL CONTROLLER
PDF  96 Pages
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производитель  ETC [List of Unclassifed Manufacturers]
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Logo ETC - List of Unclassifed Manufacturers

VT82C596 датащи(HTML) 58 Page - List of Unclassifed Manufacturers

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VT82C596B
Revision 0.3 June 17, 1999
-52-
Function 1 Registers - Enhanced IDE Controller
7HFKQRORJLHV ,QF
:H &RQQHFW
:H &RQQHFW
Offset 54 – UltraDMA FIFO Control..............................RW
7-5
Reserved (Do Not Program).............. RW, default=0
4
Split REQ Change Channel
0
Enable ....................................................default
1
Disable
3
Reserved
........................................ always reads 0
2
Change Drive to Clear All FIFO & Internal States
0
Disabled
1
Enabled ..................................................default
1
Add Dummy FIFO Push After End of Transfer
0Enabled
1
Disabled ................................................default
This bit is normally set to 0 for effective handling of
transfer lengths that are not doubleword multiples
0
Complete DMA Cycle with Transfer Size Less
Than FIFO Size
0
Enabled...................................................default
1
Disabled
Offset 61-60 - Primary Sector Size .................................. RW
15-12 Reserved
........................................ always reads 0
11-0 Number of Bytes Per Sector ................ default=200h
Offset 69-68 - Secondary Sector Size .............................. RW
15-12 Reserved
........................................ always reads 0
11-0 Number of Bytes Per Sector ... def=200h (512 bytes)



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