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VT82C596 датащи(PDF) 26 Page - List of Unclassifed Manufacturers |
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VT82C596 датащи(HTML) 26 Page - List of Unclassifed Manufacturers |
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26 / 96 page ![]() VT82C596B Revision 0.3 June 17, 1999 -20- Pinouts 7HFKQRORJLHV ,QF :H &RQQHFW :H &RQQHFW Resets and Clocks Signal Name Pin # I/O Signal Description PWRGD M18 I Power Good. Connected to the PWRGOOD signal on the Power Supply. PCIRST# A1 O PCI Reset. Active low reset signal for the PCI bus. The VT82C596B will assert this pin during power-up or from the control register. RSTDRV W1 O Reset Drive. Reset signal to the ISA bus. BCLK T7 O Bus Clock. ISA bus clock. OSC V11 I Oscillator. 14.31818 MHz clock signal used by the internal Timer. SUSCLK P17 O Suspend Clock. 32.768 KHz output clock for use by the North Bridge (e.g., VT82C598 Apollo MVP3) for DRAM refresh purposes. Stopped during Suspend-to- Disk and Soft-Off modes. Configuration and Test Signal Name Pin # I/O Signal Description CFG1 R17 I Configuration 1. Used to select the CPU type (0=Socket-7, 1=Slot-1). Determines the polarity of the INIT and CPURST signals. CFG2 R18 I Configuration 2. Used to select the type of decoding for the top 64 Kbytes of memory (FFFF0000h-FFFFFFFFh): 0 = Positive decode, 1 = Subtractive decode. TEST# V18 I Test. Used to select chip test modes. Pulled up externally to VCCSUS for normal operation. Power and Ground Signal Name Pin # I/O Signal Description VCC E9, E11, E12, E16, F5, F6, F14, F15, G6, P15, R6, R7, R15, T6 P Core Power. 3.3V nominal (3.15V to 3.45V). This supply is turned on only when the mechanical switch on the power supply is turned on and the PWRON signal is conditioned high. This pin should be connected to the same voltage as the CPU I/O circuitry. VREF J16 P Voltage Reference. 5V nominal (4.75 to 5.25) to provide 5V input tolerance. This voltage should be on only when the mechanical switch on the power supply is turned on and the PWRON signal is conditioned high. VCCSUS N16, R16 P Suspend Power. Always available unless the mechanical switch of the power supply is turned off. If the "soft-off" state is not implemented, then this pin can be connected to VCC. Signals powered by or referenced to this plane are: BATLOW#, CFG1-2, EXTSMI#, GPI1, GPO8, IRQ8#, LID, RI#, SMBALRT#, SMBCLK, SMBDATA, PWRBTN#, SUS[A-C]#, SUSCLK, SUSST[1-2]#, TEST#, PWROK, RSMRST#. VBAT L16 P RTC Battery. Battery input for internal RTC (RTCX1, RTCX2) VCCUSB K5 P USB Differential Output Power Source (USBP0+, P0-, P1+, P1-) GNDUSB J5 P USB Differential Output Ground GND D10, E7, E13, J9-12, K9-12, L9-12, M9-12 P Ground NC J4, M5, M16, N3, N18, R5 - No Connect |
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