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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VT82C596 датащи(PDF) 27 Page - List of Unclassifed Manufacturers |
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VT82C596 датащи(HTML) 27 Page - List of Unclassifed Manufacturers |
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27 / 96 page  VT82C596B Revision 0.3 June 17, 1999 -21- Register Overview 7HFKQRORJLHV ,QF :H &RQQHFW :H &RQQHFW REGISTERS Register Overview The following tables summarize the configuration and I/O registers of the VT82C596B. These tables also document the power-on default value (“Default”) and access type (“Acc”) for each register. Access type definitions used are RW (Read/Write), RO (Read/Only), “—” for reserved / used (essentially the same as RO), and RWC (or just WC) (Read / Write 1’s to Clear individual bits). Registers indicated as RW may have some read/only bits that always read back a fixed value (usually 0 if unused); registers designated as RWC or WC may have some read-only or read write bits (see individual register descriptions for details). Detailed register descriptions are provided in the following section of this document. All offset and default values are shown in hexadecimal unless otherwise indicated Table 2. System I/O Map Port Function Actual Port Decoding 00-1F Master DMA Controller 0000 0000 000x nnnn 20-3F Master Interrupt Controller 0000 0000 001x xxxn 40-5F Timer / Counter 0000 0000 010x xxnn 60-6F Keyboard Controller 0000 0000 0110 xnxn (60h) KBC Data 0000 0000 0110 x0x0 (61h) Misc Functions & Spkr Ctrl 0000 0000 0110 xxx1 (64h) KBC Command / Status 0000 0000 0110 x1x0 70-77 RTC/CMOS/NMI-Disable 0000 0000 0111 0nnn 78-7F -available for system use- 0000 0000 0111 1xxx 80 -reserved- (debug port) 0000 0000 1000 0000 81-8F DMA Page Registers 0000 0000 1000 nnnn 90-91 -available for system use- 0000 0000 1001 000x 92 System Control 0000 0000 1001 0010 93-9F -available for system use- 0000 0000 1001 nnnn A0-BF Slave Interrupt Controller 0000 0000 101x xxxn C0-DF Slave DMA Controller 0000 0000 110n nnnx E0-FF -available for system use- 0000 0000 111x xxxx 100-CF7 -available for system use- CF8-CFB PCI Configuration Address 0000 1100 1111 10xx CFC-CFF PCI Configuration Data 0000 1100 1111 11xx D00-FFFF -available for system use- Table 3. Registers Legacy I/O Registers Port Master DMA Controller Registers Default Acc 00 Channel 0 Base & Current Address RW 01 Channel 0 Base & Current Count RW 02 Channel 1 Base & Current Address RW 03 Channel 1 Base & Current Count RW 04 Channel 2 Base & Current Address RW 05 Channel 2 Base & Current Count RW 06 Channel 3 Base & Current Address RW 07 Channel 3 Base & Current Count RW 08 Status / Command RW 09 Write Request WO 0A Write Single Mask WO 0B Write Mode WO 0C Clear Byte Pointer FF WO 0D Master Clear WO 0E Clear Mask WO 0F Read / Write Mask RW Port Master Interrupt Controller Regs Default Acc 20 Master Interrupt Control — * 21 Master Interrupt Mask — * 20 Master Interrupt Control Shadow — RW 21 Master Interrupt Mask Shadow — RW * RW if shadow registers are disabled Port Timer/Counter Registers Default Acc 40 Timer / Counter 0 Count RW 41 Timer / Counter 1 Count RW 42 Timer / Counter 2 Count RW 43 Timer / Counter Control WO Port Keyboard Controller Registers Default Acc 60 Keyboard Controller Data RW 61 Misc Functions & Speaker Control RW 64 Keyboard Ctrlr Command / Status RW Port CMOS / RTC / NMI Registers Default Acc 70 CMOS Memory Address & NMI Disa WO 71 CMOS Memory Data (128 bytes) RW 72 CMOS Memory Address RW 73 CMOS Memory Data (256 bytes) RW 74 CMOS Memory Address RW 75 CMOS Memory Data (256 bytes) RW NMI Disable is port 70h (CMOS Memory Address) bit-7. RTC control occurs via specific CMOS data locations (0-0Dh). Ports 72-73 may be used to access all 256 locations of CMOS. Ports 74-75 may be used to access CMOS if the internal RTC is disabled. |
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