TMS320VC5509 datasheet(24/122 Pages) TI

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Introduction

April 2001 − Revised September 2004

SPRS163G

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

BIT I/O SIGNALS

GPIO[7:6,4:0] (LQFP)

GPIO[7:0] (BGA)

I/O/Z

7-bit (LQFP package) or 8-bit (BGA package) Input/Output lines that can

be individually configured as inputs or outputs, and also individually set or

reset when configured as outputs. At reset, these pins are configured as

inputs. After reset, the on-chip bootloader sample GPIO[3:0] to determine

the boot mode selected.

(GPIO5

only)

Input

O/Z

External flag. XF is set high by the BSET XF instruction, set low by BCLR

XF instruction or by loading ST1. XF is used for signaling other processors

in multiprocessor configurations or used as a general-purpose output pin.

XF goes into the high-impedance state when OFF is low, and is set high

following reset.

Output

OSCILLATOR/CLOCK SIGNALS

CLKOUT

O/Z

DSP clock output signal. CLKOUT cycles at the machine-cycle rate of the

CPU. CLKOUT goes into high-impedance state when OFF is low.

Output

X2/CLKIN

I/O

System clock/oscillator input. If the internal oscillator is not being used,

X2/CLKIN functions as the clock input.

NOTE: The USB module requires a 48 MHz clock. Since this input clock

is used by both the CPU PLL and the USB module PLL, it must

be a factor of 48 MHz in order for the programmable PLL to

produce the required 48 MHz USB module clock.

In CLKGEN domain idle (oscillator idle) mode, this pin becomes

output and is driven low to stop external crystals (if used) from

oscillating or an external clock source from driving the DSP’s

internal logic.

Oscillator

Input

Output pin from the internal system oscillator for the crystal. If the internal

oscillator is not used, X1 should be left unconnected. X1 does not go into

the high-impedance state when OFF is low.

Oscillator

Output

TIMER SIGNALS

TIN/TOUT0

I/O/Z

Timer0 Input/Output. When output, TIN/TOUT0 signals a pulse or a

change of state when the on-chip timer counts down past zero. When

input, TIN/TOUT0 provides the clock source for the internal timer module.

At reset, this pin is configured as an input.

NOTE: Only the Timer0 signal is brought out. The Timer1 signal is

terminated internally and is not available for external use.

Input

REAL-TIME CLOCK

RTCINX1

Real-Time Clock Oscillator input

Input

RTCINX2

Real-Time Clock Oscillator output

Output

I2C

SDA

I/O/Z

I2C (bidirectional) data. At reset, this pin is in high-impedance mode.

Hi-Z

SCL

I/O/Z

I2C (bidirectional) clock. At reset, this pin is in high-impedance mode.

Hi-Z

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer

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