AN983 datasheet(74/91 Pages) ETC

74 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

Compatibility with PCI CLKRUN scheme.

8.9.1 POWER STATES

DO (Fully On)

In this state the AN983B operates as full functionality and consumes its normal power. While

in the D0 state, if the PCI clock is lower than 16MHz, the AN983B may not receive or

transmit frames properly.

In this state the AN983B doesn’t response to any accesses, except configuration space and

full function context in place. The only network operation the AN983B can initiate is a

wake-up event.

In this state the AN983B only respond to access configuration space and full function context

in place. The AN983B can’t transmit or receive even the wake-up frame.

D3cold (Power Removed)

In this state all function context is lost. When power is restored, the function will return to D0.

D3hot (Software Visible D3)

When the AN983B is brought back to D0 from D3hot the software must perform a full

initialization.

The AN983B in the D3hot state respond to configurations cycles as long as power and clock

are supplied. This requires the device to perform an internal reset and return to a power-up

reset condition without the RST# pin asserted.

Power State

Device

State

PCI-Bus

State

Function

Context

Clock

Power

Supported

Actions to

Function

Supported

Actions from

Function

Full function context

in place

Full speed

Full

power

Any PCI

transaction

Any PCI

transaction or

interrupt

B0, B1

Configuration

maintained. No Tx and

Rx except wake-up

events

Stopped to

Full speed

PCI configuration

access

Only wake-up

events

B0, B1,

Configuration

Stopped to

PCI configuration

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

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