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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AN983 датащи(PDF) 51 Page - List of Unclassifed Manufacturers |
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AN983 датащи(HTML) 51 Page - List of Unclassifed Manufacturers |
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51 / 91 page  AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY The contents of this register should not be relied upon unless register 1 bit 5 is set (autoneg complete). After negotiation this register should contain a copy of the link partner’s register 4. All bits are therefore defined in the same way as for register 4. All bits are read only. This register is used for Base Page code word only. Base Page Register Format BIT NAME DESCRIPTION READ/WRITE DEFAULT 15 Next Page 1 = Link Partner is requesting Next Page function 0 = Base Page is requested RO 0 14 Acknowledge Link Partner acknowledgement bit RO 0 13 Remote Fault Link Partner is indicating a fault RO 0 12:5 Technology Ability Link Partner technology ability field. RO 00(hex) 4:0 Selector Field Link Partner selector field RO 00000 Register 6 BIT NAME DESCRIPTION READ/WRITE DEFAULT 15:5 Reserved RO 000(hex) 4 Parallel Detection Fault 1 = Local Device Parallel Detection Fault 0 = No fault detected RO, LH 0 3 Link Partner Next Page Able 1 = Link Partner is Next Page Able 0 = Link Partner is not Next Page Able RO 0 2 Next Page Able 1 = Local device is Next Page Able 0 = Local device is not Next Page Able RO 1 1 Page Received 1 = A New Page has been received 0 = A New Page has not been received RO, LH 0 0 Link Partner Autonegotiation Able 1 = Link Partner is Autonegotiation able 0 = Link Partner is not Autonegotiation able RO 0 LH Latch High 7.4. DESCRIPTORS AND BUFFER MANAGEMENT ADMtek Inc. www.admtek.com.tw Rev. 1.8 51 |
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