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AN983 датащи(PDF) 62 Page - List of Unclassifed Manufacturers |
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AN983 датащи(HTML) 62 Page - List of Unclassifed Manufacturers |
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62 / 91 page ![]() AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY place the 1st packet data into host memory issue transmit demand FIFO-to-host memory operation (1st packet) time Transmit enable place the 2nd packet data into host memory check the next packet check point FIFO-to-host memory operation (2nd packet) transmit threshold place the 3rd packet data into host memory 1st packet is transmitted, check the 3rd packet FIFO-to-host memory operation (3rd packet) IFG check point 1st packet 2nd packet handled by driver handled by AN983B Fig - 10 Transmit data flow of pre-fetch data 8.3.3 TRANSMIT EARLY INTERRUPT SCHEME handled by driver handled by AN983B Host to TX-FIFO Memory Operation Transmit data from FIFO to Media Normal Interrupt after Transmit Completed Driver return buffer to upper layer Early Interrupt after Host to TX- FIFO Operation Completed Driver return buffer to upper layer The saved time when transmit early interrupt is implemented time Fig - 11 Transmit normal interrupt and early interrupt comparison ADMtek Inc. www.admtek.com.tw Rev. 1.8 62 |
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