AN983 datasheet(3/91 Pages) ETC

3 / 91 page

AN983B

PCI/miPCI Fast Ethernet Controller with integrated PHY

CONTENTS

Datasheet Revision History................................................................................. 2

1. GENERAL DESCRIPTIONS...................................................................................... 9

2. SYSTEM BLOCK DIAGRAM.................................................................................. 10

3. FEATURES ................................................................................................................. 11

INDUSTRY STANDARD ............................................................................................ 11

FIFO ...................................................................................................................... 11

PCI I/F................................................................................................................... 11

EEPROM/BOOT ROM I/F .................................................................................... 11

MAC/PHYSICAL .................................................................................................... 12

LED DISPLAY........................................................................................................ 12

MISCELLANEOUS ................................................................................................... 12

4. BLOCK DIAGRAM ................................................................................................... 13

5. PIN ASSIGNMENT DIAGRAM............................................................................... 14

6. PIN DESCRIPTION ................................................................................................... 15

7. REGISTERS AND DESCRIPTORS DESCRIPTION............................................ 19

7.1 AN983B configuration registers ......................................................................... 20

7.1.1. AN983B configuration registers list ....................................................... 20

7.1.2. AN983B configuration registers table .................................................... 21

7.1.3 AN983B configuration registers descriptions.......................................... 22

CR0 (offset = 00h), LID - Loaded Identification number of Device and Vendor

........................................................................................................................... 22

CR1 (offset = 04h), CSC - Configuration command and status ....................... 22

CR2 (offset = 08h), CC - Class Code and Revision Number ........................... 23

CR3 (offset = 0ch), LT - Latency Timer........................................................... 23

CR4 (offset = 10h), IOBA - I/O Base Address................................................. 24

CR5 (offset = 14h), MBA - Memory Base Address ......................................... 24

CR11 (offset = 2ch), SID - Subsystem ID. ....................................................... 24

CR12 (offset = 30h), BRBA - Boot ROM Base Address. ................................ 24

ADMtek Inc.

www.admtek.com.tw

Rev. 1.8

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