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AN983 датащи(PDF) 50 Page - List of Unclassifed Manufacturers |
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AN983 датащи(HTML) 50 Page - List of Unclassifed Manufacturers |
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50 / 91 page ![]() AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY (bits 5-0) 3:0 PHY_ID[3-0] Revision Number (bits 3-0); Register 3, bit 0 is LS bit of PHY Identifier RO 0001(bin) This uses the OUI of ADMtek, device type of 1 and rev 0. Register 4 BIT NAME DESCRIPTION READ/WRITE DEFAULT 15 Next Page 1 = Device set to use Next Page, 0 = Device not set to use Next Page R/W 0 14 Reserved RO 0 13 Remote Fault 1 = Local remote fault sent to link partner 0 = no fault detected R/W 0 12:1 1 Not implemented Technology ability bits A7-A6 RO 00 10 Pause Technology ability bit A5 R/W 0 9 Not implemented Technology ability bit A4 RO 0 8 100BASE-TX full duplex Technology ability bit A3 1 = Unit is capable of Full Duplex 0 = Unit is not capable of Full Duplex R/W 0 7 100BASE-TX half duplex Technology ability bit A2 1 = Unit is capable of Half Duplex 0 = Unit is not capable of Half Duplex 100BASE-TX R/W 0 6 10BASE-T full duplex Technology ability bit A1 1 = Unit is capable of Full Duplex 10BASE-T 0 = Unit is not capable of Full Duplex 10BASE-T R/W 0 5 10BASE-T half duplex Technology ability bit A0 1 = Unit is capable of Half Duplex 10BASE-T 0 = Unit is not capable of Half Duplex 10BASE-T R/W 0 4:0 Selector Field Identifies type of message being sent. Currently only one value is defined. RO 00001 Register 5 The register is used to view the advertised capabilities of the link partner once autonegotiation is complete. ADMtek Inc. www.admtek.com.tw Rev. 1.8 50 |
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