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DP83902A датащи(PDF) 59 Page - National Semiconductor (TI) |
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DP83902A датащи(HTML) 59 Page - National Semiconductor (TI) |
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59 / 70 page ![]() 150 Switching Characteristics AC Specs DP83902A Note All Timing is Preliminary (Continued) DMA Memory Write TLF11157 – 40 Symbol Parameter Min Max Units bcwl Bus Clock to Write Strobe Low 40 ns bcwh Bus Clock to Write Strobe High 40 ns wds Data Setup to MWR High 2 bcyc b 30 ns wdh Data Hold from MWR Low bch a 7ns waz Write Strobe to Address TRI-STATE (Notes 1 2) bch a 40 ns asds Address Strobe to Data Strobe bcl a 10 ns aswd Address Strobe to Write Data Valid bcl a 30 ns Note 1 When using byte mode transfers A8–A15 are only TRI-STATE on the last transfer waz timing is only valid for last transfer in a burst Note 2 These limits include the RC delay inherent in our test method These signals typically turn off within bch a 15 ns enabling other devices to drive these lines with no contention 59 |
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