AD9531 datasheet(39/88 Pages) AD

номер детали	AD9531

подробное описание детали	3-Channel Clock Generator, 24 Outputs

PDF	88 Pages

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производитель	AD [Analog Devices]

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39 / 88 page

Data Sheet

AD9531

Figure 21 shows a flowchart demonstrating a robust PLL1 VCO

calibration procedure. The procedure terminates with an optional

output synchronization sequence. In the flowchart, the terms

CAL_COUNT and Timer represent variables in the software

code that a programmer may use to implement the flowchart.

START

DONE

CAL_COUNT = 0

WRITE REGISTER

0x0100[D1] = 0

VCO

CALIBRATION

PLL1 RECALIBRATION

LOOP

PLL1 LOCK DETECT

POLLING LOOP

VCO

CAL.

BIT

INPUT/OUTPUT

UPDATE BIT

VCO

CAL.

BIT

INPUT/OUTPUT

UPDATE BIT

WRITE REGISTER

0x0005[D0] = 1

WRITE REGISTER

0x0100[D1] = 1

WRITE REGISTER

0x0005[D0] = 1

WRITE REGISTER

0x0100[D2] = 1

DISTRIBUTION

SYNCHRONIZATION

OPERATION

SYNC

BIT

INPUT/OUTPUT

UPDATE BIT

SYNC

BIT

INPUT/OUTPUT

UPDATE BIT

WRITE REGISTER

0x0005[D0] = 1

WRITE REGISTER

0x0100[D2] = 0

WRITE REGISTER

0x0005[D0] = 1

CAL_COUNT =

CAL_COUNT + 1

START TIMER:

TIMER = 0

LOCK

DETECT

BIT

CAL_COUNT > 1

READ REGISTER

0x0080[D0] = 1

TIMER > 100ms

YES

PLL1 FAILED

CALIBRATION

Figure 21. PLL1 VCO Calibration Flowchart

Rev. 0 | Page 39 of 88

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