 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
XIO2001IPNP датащи(PDF) 14 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
XIO2001IPNP датащи(HTML) 14 Page - Texas Instruments |
|
|
14 / 141 page  14 XIO2001 SCPS212I – MAY 2009 – REVISED JANUARY 2016 www.ti.com Product Folder Links: XIO2001 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Miscellaneous Pins (continued) SIGNAL ZGU BALL NO. ZAJ BALL NO. PNP PIN NO. I/O TYPE CELL TYPE CLAMP RAIL EXTERNAL PARTS DESCRIPTION GPIO3 // SDA N11 L08 58 I/O LV CMOS VDD_33 Optional pullup resistor GPIO3 or serial-bus data. This terminal functions as serial-bus data if a pullup resistor is detected on SCL or when the SBDETECT bit is set in the Serial Bus Control and Status Register (see Serial- Bus Control and Status Register). If no pullup is detected then this terminal functions as GPIO3. Note: In serial-bus mode, an external pullup resistor is required to prevent the SDA signal from floating. GPIO4 // SCL M10 M10 59 I/O LV CMOS VDD_33 Optional pullup resistor GPIO4 or serial-bus clock. This terminal functions as serial-bus clock if a pullup resistor is detected on SCL or when the SBDETECT bit is set in the Serial Bus Control and Status Register (see Serial- Bus Control and Status Register). If no pullup is detected then this terminal functions as GPIO4. Note: In serial-bus mode, an external pullup resistor is required to prevent the SCL signal from floating. Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. GRST N13 M11 66 I LV CMOS VDD_33 _COMBIO – Global reset input. Asynchronously resets all logic in device, including sticky bits and power management state machines. Note: The GRST input buffer has both hysteresis and an internal active pullup. The pullup is active at all times. PCLK66_ SEL B12 A11 98 I LV CMOS VDD_33 Optional pulldown resistor PCI clock select. This terminal determines the default PCI clock frequency driven out the CLKOUTx terminals. 0 = 50 MHz PCI Clock 1 = 66 MHz PCI Clock Note: This terminal has an internal active pullup resistor. This pullup is active at all times. Note: M66EN terminal also has an affect of PCI clock frequency. SERIRQ N08 M08 52 I/O PCI Bus PCIR Pullup or pulldown resistor Serial IRQ interface. This terminal functions as a serial IRQ interface if a pullup is detected when PERST is deasserted. If a pulldown is detected, then the serial IRQ interface is disabled. VREG_ PD33 D12 E11 90 I LV CMOS VDD_33 _COMBIO Pulldown resistor 3.3-V voltage regulator powerdown. This terminal should always be tied directly to ground or an optional pulldown resistor can be used. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
