XIO2001IPNP datasheet(17/141 Pages) TI1

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XIO2001

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SCPS212I – MAY 2009 – REVISED JANUARY 2016

Product Folder Links: XIO2001

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(1)

D0 idle power state: Downstream PCI device is in PCI state D0. Downstream device driver is loaded. Downstream device is not actively

transferring data.

D0 active power state: Downstream PCI device is in PCI state D0. Downstream device driver is loaded. Downstream device is acitvely

transferring data (worst case scenario).

6.5 Nominal Power Consumption

DEVICES

POWER STATE(1)

VOLTS

AMPERES

WATTS

No downstream PCI devices

D0 idle

1.5

0.147

0.221

3.3

0.062

0.205

TOTALS:

0.209

0.426

One downstream PCI device

D0 idle

1.5

0.148

0.222

3.3

0.077

0.254

TOTALS:

0.225

0.476

One downstream PCI device

D0 active

1.5

0.157

0.236

3.3

0.165

0.545

TOTALS:

0.322

0.780

One downstream (max voltage)

D0 active

1.65

0.168

0.277

3.6

0.188

0.677

TOTALS:

0.356

0.954

(1)

SCC permits a 0, –5000 ppm modulation of the clock frequency at a modulation rate not to exceed 33 kHz.

(2)

Measurements at 2.5 GT/s require a scope with at least 6.2 GHz bandwidth. 2.5 GT/s may be measured within 200 mils of Tx device's

pins, although deconvolution is recommended.

(3)

Transmitter jitter is measured by driving the transmitter under test with a low jitter "ideal" clock and connecting the DUT to a reference

board.

(4)

Transmitter raw jitter data must be convolved with a filtering function that represents the worst case CDR tracking BW. After the

convolution process has been applied, the center of the resulting eye must be determined and used as a reference point for obtaining

eye voltage and margins.

(5)

The Tx PLL Bandwidth must lie between the min and max ranges given in the above table. PLL peaking must lie below the value listed

above. Note: the PLL B/W extends from zero up to the value(s) specified in the above table.

(6)

A single combination of PLL BW and peaking is specified for 2.5 GT/s implemenations.

6.6 PCI Express Differential Transmitter Output Ranges

PARAMETER

TERMINALS

MIN

NOM

MAX

UNIT

COMMENTS

UI(1)

Unit interval

TXP, TXN

399.88

400

400.12

Each UI is 400 ps ±300 ppm. UI does not account for SSC

dictated variations.

VTX-DIFF-PP

Differential peak-to-peak output voltage

TXP, TXN

0.8

1.2

VTX-DIFF-PP = 2*|VTXP – VTXN|

VTX-DIFF-PP-LOW

Low-power differential peak-to-peak TX

voltage swing

TXP, TXN

0.4

1.2

VTX-DIFF-PP = 2*|VTXP – VTXN|

VTX-DE-RATIO-3.5dB

TX de-emphasis level ratio

TXP, TXN

This is the ratio of the VTX-DIFF-PP of the second and

following bits after a transition divided by the VTX-DIFF-PP of

the first bit after a transition.

TTX-EYE

(2) (3) (4)

Minimum TX eye width

TXP, TXN

0.75

Does not include SSC or RefCLK jitter. Includes Rj at 10

–12.

TTX-EYE-MEDIAN-to-MAX-JITTER

(2)

Maximum time between the jitter median

and maximum deviation from the median

TXP, TXN

0.125

Measured differentially at zero crossing points after

applying the 2.5 GT/s clock recovery function.

TTX-RISE-FALL

(2)

TX output rise/fall time

TXP, TXN

0.125

Measured differentially from 20% to 80% of swing.

BWTX-PLL

(5)

Maximum TX PLL bandwidth

TXP, TXN

MHz

Second order PLL jitter transfer bounding function.

BWTX-PLL-LO-3DB

(5) (6)

Minimum TX PLL bandwidth

TXP, TXN

1.5

MHz

Second order PLL jitter transfer bounding function.

RLTX-DIFF

Tx package plus Si differential return

loss

TXP, TXN

RLTX-CM

Tx package plus Si common mode return

loss

TXP, TXN

Measured over 0.05–1.25 GHz range

ZTX-DIFF_DC

DC differential TX impedance

TXP, TXN

120

Ω

Low impedance defined during signaling.

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