MEC1322 datasheet(187/456 Pages) MICROCHIP

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 187

MEC1322

14.11.8

LINE CONTROL REGISTER

Offset 03h

Bits

Description

Type

Default

Reset

Event

7DLAB

Divisor Latch Access Bit (DLAB). It must be set high (logic “1”) to

access the Divisor Latches of the Baud Rate Generator during read

or write operations. It must be set low (logic “0”) to access the

Receiver Buffer Register, the Transmitter Holding Register, or the

Interrupt Enable Register.

R/W

RESET

6 BREAK_CONTROL

Set Break Control bit. When bit 6 is a logic “1”, the transmit data out-

put (TXD) is forced to the Spacing or logic “0” state and remains

there (until reset by a low level bit 6) regardless of other transmitter

activity. This feature enables the Serial Port to alert a terminal in a

communications system.

R/W

RESET

5STICK_PARITY

Stick Parity bit. When parity is enabled it is used in conjunction with

bit 4 to select Mark or Space Parity. When LCR bits 3, 4 and 5 are 1

the Parity bit is transmitted and checked as a 0 (Space Parity). If bits

3 and 5 are 1 and bit 4 is a 0, then the Parity bit is transmitted and

checked as 1 (Mark Parity). If bit 5 is 0 Stick Parity is disabled.

Bit 3 is a logic “1” and bit 5 is a logic “1”, the parity bit is transmitted

and then detected by the receiver in the opposite state indicated by

bit 4.

R/W

RESET

4 PARITY_SELECT

Even Parity Select bit. When bit 3 is a logic “1” and bit 4 is a logic “0”,

an odd number of logic “1”'s is transmitted or checked in the data

word bits and the parity bit. When bit 3 is a logic “1” and bit 4 is a

logic “1” an even number of bits is transmitted and checked.

R/W

RESET

3 ENABLE_PARITY

Parity Enable bit. When bit 3 is a logic “1”, a parity bit is gener-

ated (transmit data) or checked (receive data) between the last

data word bit and the first stop bit of the serial data. (The parity bit is

used to generate an even or odd number of 1s when the data word

bits and the parity bit are summed).

R/W

RESET

2 STOP_BITS

This bit specifies the number of stop bits in each transmitted or

received serial character. Table 14-14 summarizes the information.

R/W

RESET

1:0 WORD_LENGTH

These two bits specify the number of bits in each transmitted or

received serial character. The encoding of bits 0 and 1 is as follows:

R/W

RESET

TABLE 14-14: STOP BITS

Bit 2

Word Length

Number of Stop Bits

0--

15 bits

1.5

6 bits

7 bits

8 bits

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