FXLS8471Q datasheet(52/75 Pages) FREESCALE

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FXLS8471Q

Sensors

Freescale Semiconductor, Inc.

10.8.3

A_FFMT_THS (0x17), A_FFMT_ THS_X_MSB (0x73), A_FFMT_THS_X_LSB (0x74),

A_FFMT_THS_Y_MSB (0x75), A_FFMT_THS_Y_LSB (0x76), A_FFMT_THS_Z_MSB

(0x77), A_FFMT_THS_Z_LSB (0x78) registers

Freefall/motion detection threshold registers.

Table 78. A_FFMT_THS (0x17) register

a_ffmt_dbcntm

ths[6:0]

7’b0000000

Table 79. A_FFMT_THS (0x17) bit descriptions

Field

Description

a_ffmt_dbcntm

The ASIC uses a_ffmt_dbcntm to set the acceleration FFMT debounce counter clear mode independent of the value of

the a_ffmt_ths_xyz_en.

a_ffmt_dbcntm bit configures the way in which the debounce counter is reset when the inertial event of interest is

momentarily not true.

When a_ffmt_dbcntm bit is a logic ‘1’, the debounce counter is cleared to 0 whenever the inertial event of interest is no

longer true (part b, Figure 17) while if the a_ffmt_dbcntm bit is set to logic ‘0’ the debounce counter is decremented by 1

whenever the inertial event of interest in longer true

(part c, Figure 17) until the debounce counter reaches 0 or the inertial event of interest become active.

The decrementing of the debounce counter acts to filter out irregular spurious events which might impede the correct

detection of inertial events.

ths[6:0]

Freefall/motion detection threshold: default value: 7’b0000000. Resolution is fixed at 63 mg/LSB.

Table 80. A_FFMT_THS_X_MSB (0x73) register

a_ffmt_ths_xyz_en

a_ffmt_ths_x[12:6]

7’b0000000

Table 81. A_FFMT_THS_X_MSB (0x73) bit descriptions

Field

Description

a_ffmt_ths_xyz_en

For a_ffmt_ths_xyz_en = 0 the ASIC uses the ffmt_ths[6:0] value located in register x17[6:0] as a common threshold

for the X, Y, and Z-axis acceleration detection. The common unsigned 7-bit acceleration threshold has a fixed

resolution of 63 mg/LSB, with a range of 0-127 counts.

For a_ffmt_ths_xyz_en = 1 the ASIC ignores the common 7-bit G_FFMT_THS value located in register x17 when

executing the FFMT function, and the following independent threshold values are used for each axis:

A_FFMT_THS_X_MSB and A_FFMT_THS_X_LSB are used for the X-axis acceleration threshold,

A_FFMT_THS_Y_MSB and A_FFMT_THS_Y_LSB for the Y-axis acceleration threshold,

A_FFMT_THS_Z_MSB and A_FFMT_THS_Z_LSB for the Z-axis acceleration threshold.

The A_FFMT_THS_X/Y/Z thresholds are 13-bit unsigned values that have the same resolution as the accelerometer

output data determined by XYZ_DATA_CFG fs [1:0]. The a_ffmt_ths_xyz_en and a_ffmt_trans_ths_en bits must not

be enabled simultaneously.

a_ffmt_ths_x[12:6]

7-bit MSB of X-axis acceleration threshold

Table 82. A_FFMT_THS_X_LSB (0x74) register

a_ffmt_ths_x[5:0]

—

6’b000000

Table 83. A_FFMT_THS_Y_MSB (0x75) register

a_ffmt_trans_ths_en

a_ffmt_ths_y[12:6]

7’b0000000

Table 84. A_FFMT_THS_Y_LSB (0x76) register

a_ffmt_ths_y[5:0]

—

6’b000000

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