FXLS8471Q datasheet(29/75 Pages) FREESCALE

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FXLS8471Q

Sensors

Freescale Semiconductor, Inc.

10.1.3

F_STATUS (0x00) register

FIFO Status when F_SETUP[f_mode] = 0x00 > 0x00.

If the FIFO subsystem data output register driver is enabled, the status register indicates the current status information of the

FIFO subsystem.

The f_ovf and f_wmrk_flag flags remain asserted while the event source is still active, but the user can clear the FIFO interrupt

bit in the interrupt source register (INT_SOURCE) by reading the F_STATUS register. In this case, the INT_SOURCE[src_fifo]

bit will be set again when the next data sample enters the FIFO.

Therefore the f_ovf bit will remain asserted while the FIFO has overflowed and the f_wmrk_flag bit will remain asserted while the

f_cnt value is equal to or greater than then f_wmrk value.

zyxdr

zyxdr signals that a new acquisition for any of the enabled channels is available. zyxdr is cleared when the high-bytes of the

acceleration data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) are read.

X, Y, Z-axis new data ready.

0: No new set of data ready

1: New set of data is ready

zdr

zdr is set to 1 whenever a new Z-axis data acquisition is completed. zdr is cleared anytime the OUT_Z_MSB register is read.

Z-axis new data available.

0: No new Z-axis data is ready

1: New Z-axis data is ready

ydr

ydr is set to 1 whenever a new Y-axis data acquisition is completed. ydr is cleared anytime the OUT_Y_MSB register is read.

Y-axis new data available. Default value: 0

0: No new Y-axis data ready

1: New Y-axis data is ready

xdr

xdr is set to 1 whenever a new X-axis data acquisition is completed. xdr is cleared anytime the OUT_X_MSB register is read.

X-axis new data available. Default value: 0

0: No new X-axis data ready

1: New X-axis data is ready

Table 18. F_STATUS register

f_ovf

f_wmrk_flag

f_cnt[5:0]

Table 19. FIFO flag event descriptions

f_ovf

f_wmrk_flag

Event description

No FIFO overflow events detected.

FIFO overflow event detected.

No FIFO watermark event detected.

A FIFO Watermark event was detected indicating that a FIFO sample count greater than watermark

value has been reached.

If F_SETUP[f_mode] = 2’b11, a FIFO trigger event was detected

Table 20. FIFO sample count bit description

Field

Description

f_cnt[5:0]

These bits indicate the number of acceleration samples currently stored in the FIFO buffer. Count 6’b000000 indicates

that the FIFO is empty.

FIFO sample counter. Default value 6’b000000.

(6’b000001 to 6’b100000 indicates 1 to 32 samples stored in FIFO

Table 17. DR_STATUS description (Continued)

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