| поискавой системы для электроныых деталей |
|
FXLS8471Q датащи(PDF) 30 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
FXLS8471Q датащи(HTML) 30 Page - Freescale Semiconductor, Inc |
|
30 / 75 page ![]() FXLS8471Q Sensors 30 Freescale Semiconductor, Inc. 10.1.4 TRIG_CFG (0x0A) register FIFO trigger configuration register. After the interrupt flag of the enabled event in TRIG_CFG is set, the FIFO (when configured in Trigger mode) is gated at the time of the interrupt event preventing the further collection of data samples. This allows the host processor to analyze the data leading up to the event detection (up to 32 samples). For detailed information on how to utilize the FIFO and the various trigger events, please see AN4073 available on the Freescale website. 10.1.5 SYSMOD (0x0B) register The system mode register indicates the current device operating mode. Applications using the Auto-Sleep/Auto-Wake mechanism should use this register to synchronize their application with the device operating mode. The system mode register also indicates the status of the FIFO gate error flag and the time elapsed since the FIFO gate error flag was asserted. Table 21. TRIG_CFG register — — trig_trans trig_lndprt trig_pulse trig_ffmt trig_a_vecm — 00000000 Table 22. TRIG_CFG bit descriptions Field Description trig_trans Transient interrupt FIFO trigger enable. trig_lndprt Landscape/Portrait orientation interrupt FIFO trigger enable. trig_pulse Pulse interrupt FIFO trigger enable trig_ffmt Freefall/motion interrupt FIFO trigger enable trig_a_vecm Acceleration vector-magnitude FIFO trigger enable. Table 23. SYSMOD register fgerr fgt[4:0] sysmod[1:0] Table 24. SYSMOD bit description Field Description fgerr FIFO gate error. Default value: 0. 0: No FIFO gate error detected. 1: FIFO gate error was detected. Emptying the FIFO buffer clears the fgerr bit in the SYSMOD register. See CTRL_REG3 [Interrupt CTRL register] (0x2C) for more information on configuring the FIFO Gate function. fgt[4:0] Number of ODR time units since fgerr was asserted. Reset when fgerr is cleared sysmod[1:0] System mode. Default value: 0. 00: Standby mode 01: Wake mode 10: Sleep mode |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |