MIC74

Micrel

MIC74

2

August 1, 2000

Pin Description

Pin Number

Pin Name

Pin Function

1–3A0–A2

Address (Input): Slave address selection inputs; sets the three least signifi-

cant bits of the MIC74’s slave address.

4–7P0–P3

Parallel I/O (Input/Output): General-purpose I/O pin. Direction and output

type are user programmable.

8

GND

Ground

9–12

P4–P7 (/SHDN, /FS0–/FS2)

Parallel I/O (Input/output): P4–P7 are general-purpose I/O pins. Direction

and output type are user programmable.

Shutdown (Output): When the FAN bit is set, pin 9 becomes SHDN.

Fan Speed (Output): When the FAN bit is set, pins 10 through 12 become /

FS0–/FS2 respectively, controlled by the FAN_SPEED register.

13

/ALERT

Interrupt (Output): Active-low, open-drain output signals input-change-

interrupts to the host on this pin. Signal is cleared when the bus master

(host) polls the ARA (alert response address = 0001 100) or reads status.

14

CLK

Serial Bus Clock (Input): The host provides the serial bit clock in this input.

15

DATA

Serial Data (Input/Output): Serial data input and open-drain serial data

output.

16

VDD

Power Supply (Input.)

Pin Configuration

1

A0

A1

A2

P0

P1

P2

P3

GND

16 VDD

DATA

CLK

/ALERT

P7 (/FS2)

P6 (/FS1)

P5 (/FS0)

P4 (/SHDN0)

15

14

13

12

11

10

9

2

3

4

5

6

7

8

16-Lead QSOP