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MIC74 датащи(PDF) 7 Page - Micrel Semiconductor |
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MIC74 датащи(HTML) 7 Page - Micrel Semiconductor |
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7 / 20 page ![]() August 1, 2000 7 MIC74 MIC74 Micrel Functional Description Pin Descriptions VDD Power supply input connection. See “Operating Ratings.” GND Ground or return connection for all MIC74 functions. CLK An CLK signal is provided by the host (master) and is common to all devices on the bus. The CLK signal controls all transactions in both directions on the bus and is applied to each MIC74 at the CLK pin. DATA Serial data is bidirectional and is common to all devices on the bus. The MIC74’s DATA output is open-drain. The DATA line requires one external pull-up resistor or current source per system that can be located anywhere along the line. A2, A1, A0 An MIC74 responds to its own unique address which is assigned using the A0–A2 pins. A0–A2 set the three LSBs (least significant bits) of the MIC74’s 7-bit slave address. The three address pins allow eight unique MIC74 addresses in a system. When the MIC74’s address matches an address received in the serial bit stream, communication is initiated. A2, A1 and A0 should be connected to GND or V DD. The state of these pins is sampled only once at device power-on. New slave addresses are not accepted unless the MIC74 is powered off then on. Functional Diagram GND VDD P n (typical I/O port) S Q QR EDGE DETECT INT n IM n STATUS n STATUS_READ n DATA n (INPUT) OUT_CFG n DIR n DATA n (OUTPUT) Typical I/O Port (Fan Speed Control Logic Not Shown) s t u p n Is s e r d d A e v a l S 4 7 C I M 2 A1 A0 Ay r a n i Bx e H 000 0 0 1 0 0 0 0 b 0 2 h 001 0 0 1 0 1 0 0 b 1 2 h 010 0 0 1 0 0 1 0 b 2 2 h 011 0 0 1 0 1 1 0 b 3 2 h 100 0 0 1 0 0 0 1 b 4 2 h 101 0 0 1 0 1 0 1 b 5 2 h 110 0 0 1 0 0 1 1 b 6 2 h 111 0 0 1 0 1 1 1 b 7 2 h Table 1. MIC74 Address Configuration Alert Response Address The MIC74 also responds to the ARA (Alert Response Address). The ARA is used by the master (host) to request the address of a slave that has provided an interrupt to the master via the /ALERT line. The ARA is a single address (0001 100) common to all slaves and is described in more detail under “Interrupt Generation” with related information under “/ALERT.” Also see Figure 7. Pn, /SHDN, and /FS0–/FS2 P0 through P7 are general-purpose input/output bits. Each bit is independently programmable as an input or an output. If programmed as an output, each bit is further programmable as either a complementary push-pull or open-drain output. If properly enabled, any P n programmed as an input will generate an interrupt to the host using the /ALERT output when the input changes state. In this way, the MIC74 can |
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