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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MIC74 датащи(PDF) 6 Page - Micrel Semiconductor |
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MIC74 датащи(HTML) 6 Page - Micrel Semiconductor |
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6 / 20 page  MIC74 Micrel MIC74 6 August 1, 2000 Data Register A T A D ] 7 [ D] 6 [ D] 5 [ D] 4 [ D] 3 [ D] 2 [ D] 1 [ D] 0 [ D 7 P6 P5 P4 P3 P2 P1 P0 P Power-On Default Value: 1111 1111 b, FFh Command_byte addess: 0000 0101 b, 05h Type: 8-bits, read/write Bit Name: P n Function: Returns the current state of any P n configured as an input and the last value written to P n’s configured as outputs; Writing the DATA register sets the output state of any P n’s configured as outputs; writes to I/O bits configured as inputs are ignored. Read Operation: 1 = P n is high 0 = P n is low Write Operation: 1 = P n is set to one 0 = P n is cleared Notes: If Fan Mode is selected, that is, the FAN bit of the DEV_CFG register is set to one, P[7:4] are automatically configured as open-drain outputs. They are then referred to as /FS[2:0] and /SHDN. The state of these pins is deter- mined by the FAN_SPEED register. While in Fan Mode, D[7:4] of the DATA registers have no effect. Fan Speed Register D E E P S _ N A F ] 7 [ D] 6 [ D] 5 [ D] 4 [ D] 3 [ D] 2 [ D] 1 [ D] 0 [ D . o r e z s a e t i r w s y a w l Ad e e p S n a F Power-On Default Value: 0000 0000 b, 00h fan off Command_byte addess: 0000 0110 b, 06h Type: 8-bits, read/write Bit Name: D[0] through D[2] Function: Determines bit-pattern on FS[2:0] Operation: ] 0 : 2 [ D e u l a V e t a t S t u p t u O d e e p S n a F ] 0 : 2 [ S F /N D H S / 0 0 01 1 10 f f o 1 0 00 1 11 ) t s e w o l s ( 1 d e e p s 0 1 01 0 11 2 d e e p s 1 1 00 0 11 3 d e e p s 0 0 11 1 01 4 d e e p s 1 0 10 1 01 5 d e e p s 0 1 11 0 01 6 d e e p s 1 1 10 0 01 ) t s e t s a f ( 7 d e e p s Fan Speed Settings Notes: Any time the fan speed register contains zero, that is, the fan is shut down, and a non-zero value is written into the fan speed register, the /FS[2:0] and /SHDN outputs will assume the highest fan speed state for approximately one second (t START). Following this interval, the state of the fan speed control outputs will assume the value indicated by the contents of FAN_SPEED. This insures that the fan will start reliably when low speed operation is desired. Bit Name: D[3] through D[7] Function: Reserved Operation: Always write as zero. Interrupt Mask Register K S A M _ T N I ] 7 [ D] 6 [ D] 5 [ D] 4 [ D] 3 [ D] 2 [ D] 1 [ D] 0 [ D 7 M I6 M I5 M I4 M I3 M I2 M I1 M I0 M I Power-On Default Value: 0000 0000 b, 00h Command_byte addess: 0000 0100 b, 04h Type: 8-bits, read/write Bit Name: IM n Function: Interrupt enable bit for P n when Pn is config- ured as an input Operation: 1 = enabled 0 = disabled Notes: If Fan Mode is selected, that is, the FAN bit of the DEV_CFG register is set to one, P[7:4] are automatically configured as open-drain outputs. They are then referred to as /FS[2:0] and /SHDN. No interrupts of any kind are generated by these pins while in Fan Mode. |
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