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MIC74 датащи(PDF) 13 Page - Micrel Semiconductor

номер детали MIC74
подробное описание детали  2-Wire Serial I/O Expander and Fan Controller Advance Information
PDF  20 Pages
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производитель  MICREL [Micrel Semiconductor]
домашняя страница  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC74 датащи(HTML) 13 Page - Micrel Semiconductor

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August 1, 2000
13
MIC74
MIC74
Micrel
Polled Mode
Input state changes on I/O’s configured as inputs will be
reflected in the status register regardless of the state of the
global interrupt enable bit (IE) and the individual interrupt
mask bits in INT_MASK. In a system utilizing polling to
monitor for input changes, the status register is periodically
read to check for input events. The act of reading STATUS
clears it in preparation for detecting future events. The status
bits corresponding to I/O’s configured as outputs or corre-
sponding to P[7:4] when in fan mode will not be set by state
changes on these pins. It is always good practice, however,
to mask the value obtained when reading STATUS to elimi-
nate any bits, output or otherwise, that are not of immediate
concern. This will help avoid problems if software changes
are made in the future.
The flowchart shown in Figure 9a illustrates the steps in-
volved in initializing the MIC74 for polled operation. The
flowchart in Figure 10 illustrates the corresponding polling
routine. The process for writing output data is straightfor-
ward—simply write the desired bit pattern to DATA. (Special
precautions may be required when changing output data in
an interrupt driven system, however. See the discussion
below under “Writing to the Data Register.”)
Interrupt Mode
Input state changes on I/Os configured as inputs will be
reflected in the status register regardless of the state of the
global interrupt enable bit (IE) and the individual interrupt
mask bits in INT_MASK. In a system utilizing interrupts to
detect input changes, one or more of the bits in the interrupt
mask register, INT_MASK, are set to allow interrupts on
/ALERT to be generated by input events. The global interrupt
enable bit, IE, in the device configuration register must also
be set to enable interrupts.
The flowchart shown in Figure 9b illustrates the steps in-
volved in initializing the MIC74 for interrupt-driven operation.
The flowchart in Figure 11 illustrates the corresponding inter-
rupt service routine using the SMBus ARA (alert response
address). The corresponding timing diagram is shown in
Figure 7. The flowchart in Figure 12 illustrates the corre-
sponding interrupt service routine using polling to determine
the interrupt source. Figure 8 illustrates the timing. Utilizing
the ARA greatly speeds identification of the interrupting slave
device and lowers latency, as only a single transaction on the
bus is necessary to identify the interrupt source.
Using either method, STATUS must be read to determine the
exact source of the interrupt within the MIC74. The act of
Read
STATUS
Is
S
x set
?
No
Yes
Polling the
MIC74
Service function
x
Is
STATUS
≠ 00
h
?
Yes
No
Is
S
m set
?
No
Yes
Service function
m
Is
S
n set
?
No
Yes
Service function
n
Figure 10: Polling the MIC74



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