PM0214 datasheet(213/245 Pages) STMICROELECTRONICS

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PM0214

Core peripherals

244

Binary point

The PRIGROUP field indicates the position of the binary point that splits the PRI_n fields in

the Interrupt Priority Registers into separate group priority and subpriority fields. Table 51

shows how the PRIGROUP value controls this split. If you implement fewer than 8 priority

bits you might require more explanation here, and want to remove invalid rows from the

table, and modify the entries in the number of columns.

Bits 31:16

VECTKEYSTAT/ VECTKEY Register key

Reads as 0xFA05

On writes, write 0x5FA to VECTKEY, otherwise the write is ignored.

Bit 15

ENDIANESS Data endianness bit

Reads as 0.

0: Little-endian

Bits 14:11

Reserved, must be kept cleared

Bits 10:8

PRIGROUP: Interrupt priority grouping field

This field determines the split of group priority from subpriority, see Binary point on page 213.

Bits 7:3

Reserved, must be kept cleared

Bit 2

SYSRESETREQ System reset request

This is intended to force a large system reset of all major components except for debug.

This bit reads as 0.

0: No system reset request

1: Asserts a signal to the outer system that requests a reset.

Bit 1

VECTCLRACTIVE

Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to

this bit, otherwise behavior is unpredictable.

Bit 0

VECTRESET

Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to

this bit, otherwise behavior is unpredictable.

Table 51. Priority grouping

PRIGROUP

[2:0]

Interrupt priority level value, PRI_N[7:4]

Number of

Binary

point(1)

1. PRI_n[7:4] field showing the binary point. x denotes a group priority field bit, and y denotes a subpriority

field bit.

Group priority

bits

Subpriority

bits

Group

priorities

Sub

priorities

0b011

0bxxxx

[7:4]

None

0b100

0bxxx.y

[7:5]

[4]

0b101

0bxx.yy

[7:6]

[5:4]

0b110

0bx.yyy

[7]

[6:4]

0b111

0b.yyyy

None

[7:4]

None

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