PM0214 datasheet(93/245 Pages) STMICROELECTRONICS

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PM0214

The STM32 Cortex-M4 instruction set

244

3.5.10

SHADD16 and SHADD8

Signed halving add 16 and Signed halving add 8

Syntax

op{cond}{Rd,} Rn, Rm

where:

•

op is any of:

SHADD16: Signed halving add 16

SHADD8: Signed halving add 8

•

‘cond’ is an optional condition code (see Conditional execution on page 64)

•

‘Rd’ is the destination register

•

‘Rn’ is the register holding the operand

•

‘Rm’ is the second operand register.

Operation

Use these instructions to add 16-bit and 8-bit data and then to halve the result before writing

the result to the destination register:

The SHADD16 instruction:

Adds each halfword from the first operand to the corresponding halfword of the second

operand.

Shuffles the result by one bit to the right, halving the data.

Writes the halfword results in the destination register.

The SHADDB8 instruction:

Adds each byte of the first operand to the corresponding byte of the second operand.

Shuffles the result by one bit to the right, halving the data.

Writes the byte results in the destination register.

Restrictions

Do not use SP and do not use PC.

Condition flags

These instructions do not change the flags.

Examples

SHADD16 R1, R0

; Adds halfwords in R0 to corresponding halfword of R1 &

; writes halved result to corresponding halfword in R1

SHADD8

R4, R0, R5 ; Adds bytes of R0 to corresponding byte in R5 and

; writes halved result to corresponding byte in R4.

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