AN2014 datasheet(12/65 Pages) STMICROELECTRONICS

12 / 65 page

EEPROM cell and memory array architecture

AN2014

12/65

DocID10701 Rev 10

1.1.3

Cycling limit of EEPROM cells

When a cell is cycled (repeatedly erased and programmed) two common phenomena occur

and are amplified during the memory cell lifetime. When tunneling, negative charges can

either be trapped in some imperfection of the oxide or damage the Tunnel Oxide:

Charge trapping

The accumulation of negative charges in the thin Tunnel Oxide creates an electric

barrier in the Tunnel Oxide. The high voltage needed for the tunneling effect becomes

even higher: programming high voltages are no more able to move enough charges to

program the cell properly. The Erased and Written states become undifferentiated.

Stress on oxide

When the Tunnel Oxide deteriorates, a positive charge path may appear, that

facilitates undesirable leakage through the Tunnel Oxide. The floating gate is no more

100% insulated, and loses its charges, and so the data retention time drops drastically.

Figure 9. Accumulation of negative or positive charges in the tunnel oxide

Charge trapping and oxide damage are accelerated at high temperatures. They are directly

involved in cell cycling and endurance limitations.

Permanent digital information storage has to cope with physical phenomena and analog

nonlinear behaviors that have natural limits and are sensitive to wear-out and improper use

conditions.

AI10251

Control Gate

Source

Horizontal electric barrier

disturbing erase and write

Oxide

- - + - - -

Channel Region

Vertical electric path

leading to leakage

Gate Oxide

Floating Gate

AN2014 датащи(PDF) 12 Page - STMicroelectronics