AN4253 datasheet(38/44 Pages) STMICROELECTRONICS

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asm examples

AN4253

38/44

DocID024255 Rev 2

se_and

r0, r1

// look for destructive resets

se_cmpi r0,0

// is one of them '1' ?

se_bc

01,02,rgm_fes_handler

// if no - jump to Functional handler

rgm_des_handler:

// do what is needed for destructive path

// ....

se_b

rgm_clear

// go to flag reset operation

rgm_fes_handler:

// analyze if the reset was expected or not

// ...

rgm_clear:

e_lis

r1, 0xFFFF

e_or2i

r1, 0xFFFF

// prepare value for clear-write-1 oper.

e_stw

r1, RGM_REG_FESDES (r7)

// write '1' to clear all flags

rgm_end:

A.7

Safe mode block

// Base address of ME module to r7

e_lis

r7, ME_BASE@h

e_or2i

r7, ME_BASE@l

// read status & check SAFE mode

e_lwz

r0, ME_REG_GS (r7)

// read GS register

se_srwi

r0, 0x1C

// shift S_CURRENT_MODE field for comparison

se_cmpi

r0, ME_GS_MODE_SAFE

// compare with SAFE mode value

se_bc

0,2,me_end

// not in SAFE mode > end SAVE handler

me_save_drun_change:

// SAFE mode is present, request change to DRUN

e_lis

r7, ME_BASE@h

e_or2i

r7, ME_BASE@l

e_lis

r0, ME_MCTL_DRUN_R1@h

e_or2i

r0, ME_MCTL_DRUN_R1@l

e_stw

r0, ME_REG_MCTL (r7)

// 1. step - normal key

e_lis

r0, ME_MCTL_DRUN_R2@h

e_or2i

r0, ME_MCTL_DRUN_R2@l

e_stw

r0, ME_REG_MCTL (r7)

// 2. step - inverted key

// wait for transition to complete (test of GS.MTRANS bit)

me_wait_transition:

e_lwz

r0, ME_REG_GS (r7)

// read GS register

se_btsti

r0,ME_GS_MTRANS

// test the MTRANS bit

se_bc

0,2,me_wait_transition

// if '1' > wait in loop

// read status & check DRUN mode

se_srwi

r0, 0x1C

// shift S_CURRENT_MODE rigth for comparison

se_cmpi

r0, ME_GS_MODE_DRUN

// compare with DRUN value

se_bc

1,2,me_end

// if DRUN=TRUE > end the ME handler

// DRUN is not entered

// execute Fault management

me_drun_fault:

// execute fault handler in the case of unsuccessful Mode transition

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