| поискавой системы для электроныых деталей |
|
28F016SA датащи(PDF) 15 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
28F016SA датащи(HTML) 15 Page - Intel Corporation |
|
15 / 55 page ![]() E 28F016SA 15 4.3 28F008SA–Compatible Mode Command Bus Definitions First Bus Cycle Second Bus Cycle Command Notes Oper Addr Data(4) Oper Addr Data Read Array Write X xxFFH Read AA AD Intelligent Identifier 1 Write X xx90H Read IA ID Read Compatible Status Register 2 Write X xx70H Read X CSRD Clear Status Register 3 Write X xx50H Word/Byte Program Write X xx40H Write PA PD Alternate Word/Byte Program Write X xx10H Write PA PD Block Erase/Confirm Write X xx20H Write BA xxD0H Erase Suspend/Resume Write X xxB0H Write X xxD0H ADDRESS DATA A = Array Address AD = Array Data BA = Block Address CSRD = CSR Data IA = Identifier Address ID = Identifier Data PA = Program Address PD = Program Data X = Don’t Care NOTES: 1. Following the Intelligent Identifier command, two read operations access the manufacturer and device signature codes. 2. The CSR is automatically available after device enters data program, block erase, or suspend operations. 3. Clears CSR.3, CSR.4 and CSR.5. Also clears GSR.5 and all BSR.5 and BSR.2 bits. 4. The upper byte of the data bus (DQ8–15) during command writes is a “Don’t Care” in x16 operation of the device. See Status Register definitions. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |