| поискавой системы для электроныых деталей |
|
HDM8513 датащи(PDF) 40 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
HDM8513 датащи(HTML) 40 Page - Hynix Semiconductor |
|
40 / 67 page ![]() 40 5.4 I2C Mode The HDM8513A utilizes the subaddress technique when the I2C mode is employed. In all cases, the HDM8513A behaves as the slave device (transmitter or receiver), whilst the host behaves as the master device. The seven bit slave address of the HDM8513A is user selectable, being defined by the inputs to HI_DATA[6:0] when the HDM8513A is in I2C mode. Further information on the I2C bus formats and protocols is contained in the Philips Semiconductors I2C specification. In a 100pin configuration, SDA_I2CO and SCL_I2CO are added to provide a by-passing function. When I2C bypass bit is set to zero, SDA_I2CO and SCL_I2CO are disabled. 5.4.1 I2C Write to HDM8513A The master initiates communication with the HDM8513A by generating a start condition and then sending the HDM8513A the slave address defined by the seven bit hardwired address on HI_DATA [6:0]. Per I2C convention, the eighth bit in the address byte is a read/not write bit, and should be set to zero. The HDM8513A will acknowledge the correctly sent slave address, following which the master sends an eight bit word address; this is the address of the first HDM8513A register to be written to. Once the word address has been acknowledged by the HDM8513A, the master can then transmit the byte to be written to the word address. Once this byte is acknowledged by the HDM8513A, the word address is automatically incremented and further data bytes may be transmitted by the master as necessary; one transmission may therefore contain a number of bytes of data to be written to a sequential set of addresses (dummy bytes should be written to addresses not defined in the HDM8513A register set to continue this process). The process is terminated by the master generating a stop condition. Figure 25 depicts this protocol. S SLAVE ADDRESS 0 A WORD ADDRESS A P 7 Bits 8 Bits acknowledgement from slave R/W acknowledgement from slave acknowledgement from slave auto increment memory word address DATA BYTE A repeat if necessary S - Start Condition A - Acknowledge P - Stop Condition FIGURE 26: I2C WRITE TO THE HDM8513A 5.4.2 I2C Read from the HDM8513A To read information from the HDM8513A, the master must first write the desired word address. Hence the master must first generate a start condition and transmit the seven bit HDM8513A slave address defined on HI_DATA[6:0], with the eighth bit (read/not write) set to zero. Once this has been acknowledged by the HDM8513A, the master transmits the first word address from which it wishes to read information. The master must then generate a second start condition and |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |