HT9480 datasheet(23/57 Pages) HOLTEK

номер детали	HT9480

подробное описание детали	Pager Controller

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производитель	HOLTEK [Holtek Semiconductor Inc]

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The operation of the decoder is controlled by a

pager control address (1EH) in conjunction with

a pager data address (1FH). Upon receipt of a

valid call the data ready interrupt is generated.

• The POCSAG paging code

The CCIR Radio paging Code No.1 (POCSAG

Code) is constructed according to the follow-

ing rules:

A transmission consists of a preamble fol-

lowed by a batch of complete code words. Each

batch begins with a synchronization codeword

(SC). The format of the signal is illustrated in

the following Figure.

Each transmission begins with a preamble to

achieve bit synchronization. The preamble is

a pattern of one and zero; 10101010... re-

peated for a period of at least 576 bits.

Codewords are transmitted in batches. Each

batch consists of a synchronization codeword

followed by 8 frames. Each frame consists of 2

codewords. The eight frames are numbered 0

through 7. All pagers are similarly divided

into 8 groups. Each pager is assigned to one of

the 8 frames according to the 3 least signifi-

cant bits (LSB) of its 21-bit identity code (ad-

dress). The 3 bits are called “Receiver Identity

Code” (RIC).

POCSAG code structure

LCD timing

HT9480

23th Feb ’98

HT9480 датащи(PDF) 23 Page - Holtek Semiconductor Inc