HT9480 datasheet(17/57 Pages) HOLTEK

17 / 57 page

Reset

There are five ways in which a reset can occur:

• Power on reset (POR)

• RES reset during normal operation

• RES reset during HALT

• WDT time-out reset during normal operation

• WDT time-out reset during HALT

The WDT time-out during HALT is different

from other chip reset conditions, since it can

perform a “warm reset” that just resets the PC

and SP, leaving the other circuits to keep their

state. Some registers remain unchanged during

other reset conditions. Most registers are reset

to the “initial condition” when the reset condi-

tions are met. By examining the PD and TO

flags, the program can distinguish between dif-

ferent “chip resets”.

RESET Conditions

Power on reset

RES reset during normal

operation

RES wake-up HALT

WDT time-out during normal

operation

WDT wake-up HALT

Note:“u” means “unchanged”

If crystal mask option is selected, the

µC clock

can be fed by X1, X2 decoder input clock (See

Application Circuit 2).

The functional units chip reset status is shown

in the following table.

0000H

Interrupt

Disabled

Prescaler

Cleared

WDT

Cleared. After master

reset, WDT starts

counting.

Programmable

timer Counter

Off

Timer/event

Counter

Off

Programmable

Tone Generator

Off

Pager Decoder

Off

Input/output Ports

input mode

Points to the top of the

stack

Reset circuit

Reset configuration

HT9480

23th Feb ’98

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