AT25DF161_13 datasheet(31/52 Pages) ETC2

31 / 52 page

AT25DF161

Notes:

1. Only bits 4 and 3 of Status Register Byte 2 will be modified when using the Write Status Register Byte 2 command

2. R/W = Readable and writeable

R = Readable only

11.1.1 SPRL Bit

The SPRL bit is used to control whether the Sector Protection Registers can be modified or not. When the SPRL bit is in

the logical “1” state, all Sector Protection Registers are locked and cannot be modified with the Protect Sector and

Unprotect Sector commands (the device will ignore these commands). In addition, the Global Protect and Global

Unprotect features cannot be performed. Any sectors that are presently protected will remain protected, and any sectors

that are presently unprotected will remain unprotected.

When the SPRL bit is in the logical “0” state, all Sector Protection Registers are unlocked and can be modified (the Protect

Sector and Unprotect Sector commands, as well as the Global Protect and Global Unprotect features, will be processed as

normal). The SPRL bit defaults to the logical “0” state after device power-up. The Reset command has no effect on the

SPRL bit.

The SPRL bit can be modified freely whenever the WP pin is deasserted. However, if the WP pin is asserted, then the

SPRL bit may only be changed from a logical “0” (Sector Protection Registers are unlocked) to a logical “1” (Sector

Protection Registers are locked). In order to reset the SPRL bit back to a logical “0” using the Write Status Register Byte 1

command, the WP pin will have to first be deasserted.

The SPRL bit is the only bit of Status Register Byte 1 that can be user modified via the Write Status Register Byte 1

command.

11.1.2 EPE Bit

The EPE bit indicates whether the last erase or program operation completed successfully or not. If at least one byte during

the erase or program operation did not erase or program properly, then the EPE bit will be set to the logical “1” state. The

EPE bit will not be set if an erase or program operation aborts for any reason such as an attempt to erase or program a

protected region or a locked down sector, an attempt to erase or program a suspended sector, or if the WEL bit is not set

prior to an erase or program operation. The EPE bit will be updated after every erase and program operation.

Table 11-2.

Status Register Format – Byte 2

Bit(1)

Name

Type(2)

Description

RES

Reserved for future use

RES

Reserved for future use

RES

Reserved for future use

RSTE

Reset Enabled

R/W

Reset command is disabled (default)

Reset command is enabled

SLE

Sector Lockdown Enabled

R/W

Sector Lockdown and Freeze Sector Lockdown State

commands are disabled (default)

Sector Lockdown and Freeze Sector Lockdown State

commands are enabled

Program Suspend Status

No sectors are program suspended (default)

A sector is program suspended

Erase Suspend Status

No sectors are erase suspended (default)

A sector is erase suspended

RDY/BSY

Ready/Busy Status

Device is ready

Device is busy with an internal operation

3687H–DFLASH–5/2013

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