AFE032 datasheet(61/77 Pages) TI1

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AFE032

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SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013

POWER SUPPLIES

The device has two low-voltage analog power-supply pins and one low-voltage digital supply pin. Internally, the

two analog supply pins are connected to each other through back-to-back electrostatic discharge (ESD)

protection diodes. These pins must be connected to each other on the application printed circuit board (PCB).

Connecting the digital supply pin and the two analog supply pins together on the PCB is also recommended.

Both low-voltage analog ground pins are also connected internally through back-to-back ESD protection diodes.

These ground pins should also be connected to the digital ground pin on the PCB. Bypassing the low-voltage

power supplies with a parallel combination of a 10-

μF and 100-nF capacitor is recommended. The PA block is

biased separately from a high-voltage, high-current supply.

Three PA power-supply pins and three PA ground pins are available to provide a path for the high currents

associated with driving the low impedance of the ac mains. Connecting the three PA supply pins together is

recommended. Placing a 47-

μF to 100-μF bypass capacitor in parallel with a 100-nF capacitor as close as

possible to the device is also recommended. Care must be taken when routing the high-current ground lines on

the PCB to avoid creating voltage drops in the PCB ground that may vary with changes in load current.

The device has many options to enable or disable the functional blocks to allow for flexible power-savings

modes. Refer to the Electrical Characteristics: Power Supply table for power consumption in specific modes.

DAC, SD, INT, TSENSE, TX_FLAG, AND RX_FLAG PINS

This section discusses the DAC, SD, INT, TSENSE, TX_FLAG, and RX_FLAG pins.

DAC (Pin 7)

The DAC pin is used to configure the SPI to either read data to or write data from the command and data

registers, or to write data to the DAC register. Setting the DAC pin high allows access to the DAC register.

Setting the DAC pin low allows access to the command and data registers.

SD (Pin 8)

The shutdown pin (SD) can be used to shut down the entire device for maximum power savings. When the SD

pin is low, the device operates normally. When the SD pin is high, all circuit blocks within the device (including

the serial interface) are placed in the lowest-power operating modes. In this condition, the entire device draws

only 395

μA (typical) of current. All register contents at the time the device is placed in shutdown mode are

erased; when the device is re-enabled, the register contents are the device default values. Follow the protocol

described in the External Reset and Analog Shutdown Mode section when asserting the SD pin.

INT (Pin 9)

The interrupt pin (INT) is an active-low, open-drain output pin that can be used to signal the microprocessor of an

unusual operating condition that results from an anomaly on the power line. The INT pin can be triggered by

external circuit conditions and SPI operations, depending upon the REG_FLAG_CTL register settings. The

device can be programmed to issue an interrupt on current overload, thermal overload, and digital error

conditions. Refer to the AFE032 Interrupts section for more information.

When an interrupt is signaled (that is, INT goes low), the contents of the IFLAG_INT, TFLAG_INT, and

DIG_ERR_INT bits (bits 7, 6, and 4, respectively, in the REG_AFE_STATUS register) can be read to determine

the type of interrupt that occurred. The REG_FLAG_CTL register settings should be configured each time the

device is powered on.

Current overload and thermal overload conditions are explained in the Current Overload and Thermal Overload

sections. Digital error conditions are explained in the AFE032 Interrupts section.

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