AFE032 datasheet(32/77 Pages) TI1

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AFE032

SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013

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Block 3 Is Bypassed, Block 4 Is Included

If an external DSP transmits DAC samples to the device at a rate close to but less than the DAC_CLK frequency

(that is, fS < DAC_CLK), then block 3 is bypassed and block 4 is included. Write a '0' to bits 1, 2, and 3 and write

a '1' to bit 4 of the REG_AFE032_CTRL register. In this case, the 32-bit parameter for block 4 must be calculated

and written. This mode of operation is recommended as long as the ratio between fS and DAC_CLK is greater

than 0.8 and less than 1 (that is, 0.8 DAC_CLK < fS < DAC_CLK). Table 11 shows examples of this scenario.

To calculate the 32-bit parameter for block 4:

•

Calculate the ratio between fS and DAC_CLK. Ratio = fS / DAC_CLK.

•

Multiply the ratio by 4,294,967,296. Product = (ratio)(4,294,967,296).

•

The parameter for block 4 is equal to the integer part of the product found. Parameter = integer part of

product.

The value of the 32-bit parameter for block 4 must be written in hexadecimal form to the REG_OFFSET0,

REG_OFFSET1, REG_OFFSET2, and REG_OFFSET3 registers. The order should be such that the most

significant byte of the parameter is stored in REG_OFFSET0 and the least significant byte is stored in

REG_OFFSET3.

Table 11. Example Cases of Block 3 Bypassed and Block 4 Included

BLOCK 4

XCLK

REG_CLK_

DAC_CLK

PARAMETER

(MSPS)

(MHz)

DIVIDER

DIV (Hex)

(MHz)

BLOCK 3

BLOCK 4

(Hex)

1.2

37.5

1.339

Bypassed

Included

E5604189

0.8

37.5

0.833

Bypassed

Included

F5C28F5C

Block 3 and Block 4 Are Included

If an external DSP transmits DAC samples to the device at a rate close to but less than one-fourth the DAC_CLK

frequency [that is, fS < (DAC_CLK / 4)], then both block 3 and block 4 are included. Write a '0' to bits 1 and 2 and

write a '1' to bits 3 and 4 of the REG_AFE032_CTRL register. In this case, the 32-bit parameter for block 4 must

be calculated and written. This mode of operation is recommended as long as the ratio between fS and

DAC_CLK is greater than 0.2 and less than 0.25 (that is, 0.2 DAC_CLK < fS < 0.25 DAC_CLK). Table 12 shows

examples of this scenario.

To calculate the 32-bit parameter for block 4:

•

Calculate the ratio between fS and DAC_CLK. Ratio = fS / DAC_CLK.

•

Multiply the ratio by 17,179,869,184. Product = (ratio)(17,179,869,184).

•

The parameter for block 4 is equal to the integer part of the product found. Parameter = integer part of

product.

The value of the 32-bit parameter for block 4 must be written in hexadecimal form to the REG_OFFSET0,

REG_OFFSET1, REG_OFFSET2, and REG_OFFSET3 registers. The order should be such that the most

significant byte of the parameter is stored in REG_OFFSET0 and the least significant byte is stored in

REG_OFFSET3.

Table 12. Example Cases of Block 3 and Block 4 Included

BLOCK 4

XCLK

REG_CLK_

DAC_CLK

PARAMETER

(MSPS)

(MHz)

DIVIDER

DIV (Hex)

(MHz)

BLOCK 3

BLOCK 4

(Hex)

37.5

4.167

Included

F5C28F5C

19.2

4.8

Included

D5555555

0.4

22.5

1.607

Included

FEDCBA98

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