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MSC1202Y2RHHT датащи(PDF) 78 Page - Texas Instruments |
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MSC1202Y2RHHT датащи(HTML) 78 Page - Texas Instruments |
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78 / 92 page ![]() MSC1200 MSC1201 MSC1202 SBAS317E − APRIL 2004 − REVISED MAY 2006 www.ti.com 78 Power-Down Control (PDCON) 7 6 5 4 3 2 1 0 Reset Value SFR F1h PDICLK PDIDAC PDI2C 0 PDADC PDWDT PDST PDSPI 6Fh Turning peripheral modules off puts the MSC120x in the lowest power mode. PDICLK Internal Clock Control. bit 7 0 = Internal Oscillator and PLL On (Internal Oscillator or PLL mode) 1 = Internal Oscillator and PLL Power Down (External Clock mode). Bit is not active on IOM or PLL mode. PDIDAC IDAC Control. bit 6 0 = IDAC On 1 = IDAC Power Down (default) PDI2C I2C Control. bit 5 0 = I2C On (only when PDSPI = 1) 1 = I2C Power Down (default) PDADC ADC Control. bit 3 0 = ADC On 1 = ADC, VREF, and Summation registers are powered down (default). PDWDT Watchdog Timer Control. bit 2 0 = Watchdog Timer On 1 = Watchdog Timer Power Down (default) PDST System Timer Control. bit 1 0 = System Timer On 1 = System Timer Power Down (default) PDSPI SPI System Control. bit 0 0 = SPI System On 1 = SPI System Power Down (default) |
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