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STM8L151F3P6 датащи(PDF) 95 Page - STMicroelectronics |
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STM8L151F3P6 датащи(HTML) 95 Page - STMicroelectronics |
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95 / 112 page ![]() STM8L151x2, STM8L151x3 Electrical parameters Doc ID 018780 Rev 4 95/112 Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts*(n+1) supply pin). Two models can be simulated: human body model and charge device model. This test conforms to the JESD22-A114A/A115A standard. Static latch-up ● LU: 3 complementary static tests are required on 6 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin) and a current injection (applied to each input, output and configurable I/O pin) are performed on each sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details, refer to the application note AN1181. Table 52. ESD absolute maximum ratings Symbol Ratings Conditions Maximum value (1) 1. Data based on characterization results, not tested in production. Unit VESD(HBM) Electrostatic discharge voltage (human body model) TA = +25 °C 2000 V VESD(CDM) Electrostatic discharge voltage (charge device model) 500 Table 53. Electrical sensitivities Symbol Parameter Class LU Static latch-up class II |
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